Vertical Transistor Super Junction Manufacturing via Trench Epitaxy
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Solution Overview
Problem
The existing methods for manufacturing semiconductor devices with super-junction structures face challenges in achieving high withstand voltage and low ON-resistance while minimizing manufacturing time and cost, due to issues such as thick epitaxial layer formation, trench filling, and maintaining charge balance between N-type and P-type layers.
Innovation Solution
A method involving the formation of trenches on a semiconductor substrate, followed by the growth of conductive type semiconductor films within these trenches, and subsequent thinning of the substrate to create alternating layers with controlled impurity concentrations, allowing for the formation of vertical type channel transistors without the need for a support substrate, thereby reducing manufacturing time and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the N type epitaxial layer is thickened to achieve high withstand voltage, then the withstand voltage is improved, but the film formation time increases and process cost becomes high
Solution Approach 1:
The N type epitaxial layer is formed preliminarily on the substrate before trench formation. This preliminary action allows the thick epitaxial layer to be in place before the P type layers are deposited in the trenches, enabling high withstand voltage to be achieved without extending the overall process time since the epitaxial growth occurs in parallel with the trench formation sequence rather than sequentially after it.
2Manufacturing precision
If the widths of N type and P type layers are made small to heighten concentrations, then the ON-resistance is reduced, but the trench becomes narrow and causes cavity formation during epitaxial layer formation
Solution Approach 1:
The P type epitaxial layers are formed preliminarily in the trenches before the N type epitaxial layer is deposited on the substrate surface. This preliminary formation of P type layers in the narrow trenches ensures they are properly positioned and prevents cavity formation when the N type layer is subsequently added, as the P type layers act as placeholders that guide the uniform deposition process.
Solution Approach 2:
The invention transitions from forming layers in a single planar dimension to utilizing vertical dimensionality by forming P type layers within the depth of trenches, then adding the N type layer on the surface. This dimensional approach allows narrow trench widths to be maintained for low ON-resistance while ensuring complete filling through controlled vertical deposition sequences.
3Strength
If the N type epitaxial layer is formed on the substrate to achieve high withstand voltage, then the withstand voltage is improved, but the impurity concentration in the P type epitaxial layer deviates from target value due to outward diffusion
Solution Approach 1:
The P type epitaxial layers are formed preliminarily in the trenches before the N type epitaxial layer is formed on the substrate. By establishing the P type layers first with their intended impurity concentrations, the subsequent formation of the N type layer does not cause significant outward diffusion into the already-formed P type regions, as the deposition conditions are optimized to minimize inter-diffusion during the sequential process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the efficient formation of semiconductor devices with improved withstand voltage and reduced ON-resistance by controlling impurity concentrations and layer thicknesses, while eliminating the need for a support substrate and reducing the complexity of epitaxial layer formation.
Implementation Method 1
forming a second conductive type semiconductor film in each trench
Implementation Method 2
impurity ions migrate from the N+ type substrate into the P type epitaxial layer being formed, on account of an outward diffusion
Data Source
AI summary
A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.