Vertical Transistor Void Spaces and Wide Band Gap Channel

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Solution Overview

Problem

Conventional semiconductor transistors face challenges in scaling down memory devices while maintaining performance due to increased off-state leakage current and limited miniaturization of gate dielectric materials, which affects memory density and switching speed.

Innovation Solution

The use of a semiconductive material with a larger band gap, such as zinc tin oxide, for the channel region in vertical transistors, combined with a gate dielectric and gate electrode structure that includes void spaces between the pillar and the gate electrodes, reduces off-state leakage current and increases switching speed by optimizing the thickness and height of these components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the thickness of gate dielectric material is reduced to scale down transistor size, then memory density is improved, but off-state leakage current increases due to band-to-band tunneling

Engineering Contradiction:

Improvememory device footprintVSAvoidoff-state leakage current

Core Design Contradiction:

Area of stationary objectVSObject-generated harmful factors

Solution Approach 1:

The patent changes the material parameter (band gap) by transitioning from conventional silicon to wide band gap semiconductive materials, enabling thinner gate dielectric without increasing leakage current. This parameter change allows aggressive scaling while maintaining low off-state leakage.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures combining wide band gap semiconductive channel materials with high-k gate dielectric materials. This composite approach enables effective barrier against band-to-band tunneling while maintaining electrical performance at scaled dimensions.

Inventive Principle:

Principle #40Composite materials

2Ease of manufacture

If conventional semiconductor materials are used in scaled transistors, then manufacturing simplicity is maintained, but switching speed deteriorates due to increased capacitance and resistance

Engineering Contradiction:

Improvefabrication simplicityVSAvoidswitching speed

Core Design Contradiction:

Ease of manufactureVSSpeed

Solution Approach 1:

The patent changes the electrical parameters (mobility, band gap) by adopting wide band gap semiconductive materials, achieving faster switching speeds and lower capacitance despite increased fabrication complexity. The material parameter change enables superior electrical performance.

Inventive Principle:

Principle #35Parameter changes

3Quantity of substance

If transistor dimensions are reduced to increase memory density, then quantity of memory cells is improved, but performance deteriorates due to increased leakage and reduced switching speed

Engineering Contradiction:

Improvenumber of memory cells per dieVSAvoidtransistor performance

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent changes the fundamental material parameter (band gap) to enable aggressive scaling while maintaining low leakage currents. This parameter change allows high memory density without sacrificing transistor reliability or switching performance.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses composite material systems combining wide band gap channels with optimized gate dielectrics, achieving both high density and high performance. The composite structure simultaneously addresses leakage and switching speed requirements.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the reduction of transistor size without compromising performance, achieving a 20% decrease in effective resistance and capacitance, thereby enhancing switching speed and memory device efficiency.

Implementation Method 1

A device is described comprising a vertical transistor including a pillar structure, a gate electrode, a gate dielectric material, and void spaces. The pillar structure includes a channel region comprising a semiconductive material having a band gap greater than 1.65 electronvolts.

Methodology Applied

Scientific EffectBand gap:

Implementation Method 2

The void spaces laterally intervene between the gate electrode and each of the source region and the drain region. This approach allows for the reduction of transistor size without compromising performance, achieving a 20% decrease in effective resistance and capacitance.

Methodology Applied

Scientific EffectCapacitance reduction through void spaces:

Data Source

PatentUS11476259B2Memory devices including void spaces between transistor features, and related semiconductor devices and electronic systems

Publication Date: 2022.10.18 MICRON TECHNOLOGY INC

AI summary

A device comprises a vertical transistor. The vertical transistor comprises a semiconductive pillar, at least one gate electrode, a gate dielectric material, and void spaces. The semiconductive pillar comprises a source region, a drain region, and a channel region extending vertically between the source region and the drain region, the channel region comprising a semiconductive material having a band gap greater than 1.65 electronvolts. The at least one gate electrode laterally neighbors the semiconductive pillar. The gate dielectric material is laterally between the semiconductive pillar and the at least one gate electrode. The void spaces are vertically adjacent the gate dielectric material and laterally intervening between the at least one gate electrode and each of the source region and the drain region of the semiconductive pillar. Related electronic systems and methods are also disclosed.