Vertical Transmon Qubit Microstrip Coupling With Lower Dielectric Loss
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing transmon qubits face challenges with large size due to surface and dielectric loss, and vertical Josephson junctions require different designs for coupling with microwave resonators, while prior art methods for encapsulating superconducting qubits are limited by deposited dielectric losses and process constraints.
Innovation Solution
A vertical transmon qubit device with microstrip waveguides on a silicon-on-metal substrate, featuring a Josephson junction in a via of the substrate with a tunnel barrier, allowing for easier electrical coupling to top-layer microstrip lines, and a method involving attaching superconducting materials to opposing sides of a crystalline silicon substrate to form a transmon qubit and microstrip line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a planar capacitor is used in transmon qubits, then the qubit can be formed with a Josephson junction, but the qubit occupies a large area
Solution Approach 1:
The patent transitions from a planar capacitor geometry to a vertical capacitor structure, utilizing the third dimension (height) to achieve the same capacitance function in a smaller footprint. The vertical capacitor consists of top and bottom electrodes separated by a dielectric layer in the vertical direction, rather than extending laterally as in planar capacitors.
2Area of moving object
If a vertical Josephson junction is used, then the qubit size is reduced, but different designs are required for coupling with microwave resonators
Solution Approach 1:
The patent designs the vertical transmon qubit with integrated coupling structures that can interface with both planar and three-dimensional microwave resonators using the same vertical Josephson junction architecture. The coupling is achieved through inductive coupling via superconducting loops or capacitive coupling through parasitic capacitances, providing universal coupling mechanisms.
3Reliability
If encapsulation of superconducting qubit components is performed, then the qubit is protected, but loss associated with deposited dielectrics occurs
Solution Approach 1:
The patent extracts the qubit components (Josephson junction and capacitor) from the bulk substrate and places them on a thin-film substrate, allowing the qubit to be accessed and coupled from the top surface without requiring encapsulation. This extraction approach eliminates the need for deposited dielectric encapsulation layers that would introduce loss.
4Ease of operation
If coplanar waveguide is used for circuits on bottom superconductor layer, then electrical coupling is achieved, but it does not work on top superconductor layer due to proximity to bottom metal layer
Solution Approach 1:
The patent transitions from coplanar waveguide geometry (all conductors in the same plane) to a microstrip configuration where the signal conductor is separated from the ground plane by a dielectric layer in the vertical direction. This vertical separation allows the top superconductor layer to be used for circuits without interference from the bottom metal layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables more compact and efficient electrical coupling, reducing size and dielectric losses, and allows for improved signal integrity and coherence time, while avoiding additional fabrication steps for buried ground connections.
Implementation Method 1
superconducting quantum circuits generally rely on Josephson junctions, which can be fabricated in a semiconductor device. A Josephson junction generally manifests the Josephson effect of a supercurrent, where current can flow indefinitely across a Josephson junction without an applied voltage.
Implementation Method 2
A microstrip line is used to couple to the transmon qubit
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A chip surface base device structure (200) comprises a superconducting material (214A) located on a first side of a substrate (106A, 106B), and a second superconducting material located (104) on a second side of the substrate and stacked on a second substrate (102), wherein the first side of the substrate and the second side of the substrate are opposite sides. In one implementation, the substrate or the second substrate, or the substrate and the second substrate are crystalline silicon. In one implementation, the chip surface base device structure also comprises a transmon qubit comprising a capacitor and a Josephson junction formed in a via of the substrate and comprising a tunnel barrier. In one implementation, the chip surface base device structure also comprises a microstrip line electrically coupled to the transmon qubit.