Vertical-Transport FET With Etched Source/Drain Cavity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for forming vertical-transport field-effect transistors face challenges in growing epitaxial semiconductor material for the bottom source/drain region beneath semiconductor fins, as it cannot extend beneath the fins in conventional constructions.
Innovation Solution
A method involving the formation of a semiconductor fin over a sacrificial layer, followed by creating a support structure and removing the sacrificial layer to form a cavity, allowing epitaxial growth of the source/drain region beneath the fin, enabling uniform dopant distribution and precise placement of the source/drain region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional epitaxial growth methods are used for bottom source/drain regions, then the manufacturing process is simple, but the epitaxial material cannot grow beneath the semiconductor fins
Solution Approach 1:
The fabrication process is segmented into distinct stages: forming support structures, selectively removing sacrificial material to create cavities, and then performing epitaxial growth. This segmentation allows the epitaxial material to be grown in the previously inaccessible region beneath the fins, increasing the source/drain region volume without overwhelming complexity
Solution Approach 2:
Support structures are formed preliminarily before epitaxial growth to provide mechanical support during cavity formation. The sacrificial material is removed in advance to create the cavity space, enabling subsequent epitaxial growth beneath the fins. These preliminary actions resolve the geometric constraints that would otherwise prevent adequate source/drain region formation
2Quantity of substance
If epitaxial material is grown to extend beneath fins, then source/drain region volume increases, but requiring cavity formation and support structures increases process complexity
Solution Approach 1:
Sacrificial material serves as an intermediary that is temporarily present to define the cavity space, then removed to enable epitaxial growth. The support structures act as intermediaries providing mechanical stability during the multi-step process. These intermediary elements enable increased semiconductor material quantity in the source/drain region while managing the complexity of cavity formation
3Productivity
If conventional planar or fin-type structures are used, then fabrication is simpler, but current flow is limited to horizontal direction
Solution Approach 1:
The invention transitions from horizontal current flow in planar/fin structures to vertical current flow by forming three-dimensional cavity structures and growing epitaxial source/drain regions that extend beneath the fins. This dimensional change enables current to flow vertically through the channel, enhancing productivity while the systematic approach to cavity formation manages the associated structural complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of a vertically oriented channel with uniform dopant distribution in the source/drain region, enhancing the conductivity and structural integrity of the vertical-transport field-effect transistor.
Implementation Method 1
After forming the support structure, the sacrificial layer is removed to form a cavity extending beneath the semiconductor fin
Implementation Method 2
A semiconductor material is epitaxially grown in the cavity to form a source/drain region of a vertical-transport field-effect transistor
Data Source
AI summary
Methods of forming a structure for a vertical-transport field-effect transistor. A semiconductor fin is formed over a sacrificial layer. A support structure is connected with the semiconductor fin. After forming the support structure, the sacrificial layer is removed to form a cavity extending beneath the semiconductor fin. A semiconductor material is epitaxially grown in the cavity to form a source/drain region of the vertical-transport field-effect transistor.