Vertical Trench Capacitor and Interconnect Integration

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Solution Overview

Problem

Existing electronic devices with ferroelectric capacitors face challenges in manufacturing due to sensitivity to delamination and cracking, and the combination of vertical capacitors and interconnects is difficult to achieve without contamination or damage, especially when ferroelectric substances require specific processing conditions and high-temperature aftertreatment.

Innovation Solution

The integration of vertical trench capacitors with dielectric material between conductive surfaces, which also serves as insulation for the vertical interconnects, allowing simultaneous processing and reducing parasitic currents, enabling high-frequency properties and flexible capacitance values without the need for additional processing steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If ferroelectric substances are used for capacitors to achieve high capacitance density, then capacitance density is improved, but manufacturing reliability deteriorates due to sensitivity to delamination and cracking

Engineering Contradiction:
Improvecapacitance densityVSAvoidmanufacturing reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent replaces fragile ferroelectric substances with robust silicon oxide dielectric material that is inherently resistant to delamination and cracking. This substitution eliminates the reliability issues associated with ferroelectric materials while maintaining the capacitor functionality through vertical trench structures that achieve high capacitance density through increased surface area rather than relying on ferroelectric properties

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the fundamental approach to achieving high capacitance density by transitioning from material-based enhancement (ferroelectric substances) to geometry-based enhancement (vertical trench structures). This parameter change from material properties to structural configuration allows achieving high capacitance without the reliability penalties of ferroelectric materials

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If vertical capacitors and vertical interconnects are made separately to avoid processing conflicts, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improveprocessing accuracyVSAvoidmanufacturing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the fabrication processes for vertical capacitors and vertical interconnects into a single integrated process flow. Both structures are etched simultaneously using the same trench formation techniques, and both are filled with conductive material in the same processing step. This consolidation eliminates the need for separate processing sequences while maintaining the precision required for both structures through unified process control

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal processing methodology that serves dual purposes: forming both vertical capacitor trenches and vertical interconnect holes using identical etching and filling procedures. This multi-functional approach simplifies manufacturing by establishing a single process platform that handles both critical structures, reducing overall device complexity while preserving manufacturing precision

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If additional processing steps are added to protect capacitor layers during interconnect fabrication, then reliability is improved, but productivity deteriorates

Engineering Contradiction:
Improvedevice reliabilityVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary protective actions by forming a robust silicon oxide dielectric layer and precise conductive surface patterns before interconnect fabrication begins. These pre-formed structures are inherently resistant to damage during subsequent processing, eliminating the need for additional protective measures. The preliminary structuring allows direct progression to interconnect formation without intermediate protection steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent enables the capacitor structures to be self-protecting through their inherent design: the silicon oxide dielectric material and conductive surfaces are formed with such precision and robustness that they automatically withstand the interconnect fabrication process without requiring external protection. The structures serve their own protective function, eliminating redundant processing steps and maintaining high manufacturing efficiency

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in reliable, high-capacitance devices with low resistance and improved RF performance, reducing the number of external contacts needed and enhancing temperature stability, while allowing for various capacitance values and integration with other components like resistors and inductors.

Implementation Method 1

a layer of dielectric material is present between a first and a second conductive surface, said layer of dielectric material also being used as insulation between the substrate and the vertical interconnect

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

a capacitor and a vertical interconnect through the substrate extending from the first to the second side, on which first side the capacitor is present

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9530857B2Electronic device, assembly and methods of manufacturing an electronic device including a vertical trench capacitor and a vertical interconnect
Publication Date: 2016.12.27 ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC
  • US9530857B2 patent drawing
  • US9530857B2 patent drawing
  • US9530857B2 patent drawing

AI summary

A semiconductor substrate comprises both vertical interconnects and vertical capacitors with a common dielectric layer. The substrate can be suitably combined with further devices to form an assembly. The substrate can be made in etching treatments including a first step on the one side, and then a second step on the other side of the substrate.