Vertical Trench Diode Layout for Radiation-Induced SEB Mitigation

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Solution Overview

Problem

Semiconductor trench devices, particularly vertical trench diodes, are prone to Single Event Burnout (SEB) and leakage degradation due to large P+ to n-epi junction areas, which are sensitive to heavy-ion radiation, leading to thermal spikes and increased leakage current.

Innovation Solution

The design of vertical trench diodes with reduced P+ to n-epi junction area by incorporating a gap below the oxide and precise dopant control, along with self-aligned trench formation and channeled ion implantation, enhances radiation tolerance by increasing the SEB threshold and reducing leakage degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a vertical trench diode design is used, then the device structure is improved for radiation applications, but the P+ to n-epi junction area remains large causing SEB susceptibility

Engineering Contradiction:
Improveradiation toleranceVSAvoidP+ to n-epi junction area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the continuous P+ doped region into two separate regions: a first P+ region at the trench bottom and a second P+ region at the trench sidewall. This segmentation reduces the total P+ to n-epi junction area by eliminating the overlapping region between P+ and n-epi, thereby reducing sensitivity to ion strike-induced SEB while maintaining the vertical trench diode structure's radiation tolerance benefits

Inventive Principle:
Principle #1Segmentation

2Reliability

If P+ dopant is extended along the trench sidewall from top to bottom, then the depletion region coverage is improved, but the junction area increases causing higher SEB risk

Engineering Contradiction:
Improvedepletion region coverageVSAvoidP+ to n-epi junction area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies different P+ doping configurations to different local regions: the first P+ region is positioned at the trench bottom providing localized coverage, while the second P+ region is positioned at the trench sidewall. This local quality approach ensures adequate depletion region coverage in critical areas while minimizing the total P+ to n-epi junction area, thus reducing SEB susceptibility without compromising reliability

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The modified vertical trench diodes exhibit improved resistance to ion strike-induced SEB, with a 40% reduction in probability and higher threshold voltages, making them more radiation tolerant compared to traditional designs.

Implementation Method 1

a P+ well region is formed by channeled ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a depletion region extends from the P+ region across the n-epi region and overlaps, providing a potential barrier that covers the Schottky contact and suppresses the strong electric field at the Schottky interface

Methodology Applied
Scientific EffectDepletion region formation:

Implementation Method 3

Leakage current at the Schottky layer to semiconductor junction and the P+ to n-epi junction are caused by thermal spikes induced by the synergy of a heavy-ion strike and applied bias voltage

Methodology Applied
Scientific EffectThermal spikes:

Data Source

PatentUS12469705B2Vertical trench device configurations for radiation-environment applications
Publication Date: 2025.11.11 SCDEVICE LLC
  • US12469705B2 patent drawing
  • US12469705B2 patent drawing
  • US12469705B2 patent drawing

AI summary

Semiconductor devices and associated fabrication methods are disclosed. In one disclosed approach a process for forming a semiconductor device is provided. The process includes: implanting a first region of semiconductor material using a first channeled implant with a first conductivity type; and implanting, after the first channeled implant, a second region of semiconductor material using a second channeled implant with a second conductivity type. The first channeled implant disrupts a crystal structure of the first region of semiconductor material and does not disrupt a crystal structure of the second region of semiconductor material.