Vertical Trench IGBT Shallow Emitter Formation
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Solution Overview
Problem
The existing vertical trench IGBTs face challenges in miniaturizing the cell structure and improving the Reverse Biased Safe Operating Area (RBSOA) capacity due to limitations in forming shallow emitter layers through impurity injection and heat treatment, leading to spherical emitter layers, latch-up operations, and increased leakage current.
Innovation Solution
A method involving the formation of a polysilicon film with impurities on the semiconductor substrate, followed by impurity diffusion to create a shallow and stable emitter layer, and the use of a polysilicon film between the emitter layer and contact plug to reduce stress and leakage current, enhancing RBSOA capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If impurity injection and heat treatment are used to form the emitter layer, then the emitter layer can be formed, but the emitter layer cannot be shallowly formed and becomes spherical when width is miniaturized, leading to unstable junction
Solution Approach 1:
The patent changes the formation method parameter from impurity injection to impurity diffusion through polysilicon film. This parameter change enables precise control of emitter layer depth and concentration profile, preventing spherical deformation and maintaining junction stability during miniaturization.
Solution Approach 2:
The patent introduces polysilicon film as an intermediary medium to deliver impurities to the emitter layer region. This intermediary enables controlled diffusion process that achieves shallow, stable emitter layers without the limitations of direct impurity injection and heat treatment.
2Ease of manufacture
If cell structure is miniaturized without miniaturizing emitter layer, then manufacturing is easier, but holes accumulate during reverse bias and latch-up operation occurs
Solution Approach 1:
The patent changes the emitter layer formation mechanism to enable precise depth and concentration control. This allows the emitter layer to be miniaturized proportionally with the cell structure, preventing hole accumulation and latch-up while maintaining manufacturing feasibility through controlled diffusion processes.
3Device complexity
If stress is concentrated in the bottom of contact plug, then contact structure is simpler, but defects increase in Si substrate and leak current increases
Solution Approach 1:
The patent introduces a polysilicon film layer beforehand to act as a stress buffer between the contact plug and the semiconductor substrate. This cushioning layer distributes the stress from the contact plug, preventing substrate defects and reducing leakage current while maintaining contact structure functionality.
4Object-generated harmful factors
If polysilicon film is used between emitter layer and contact plug, then stress is reduced and leakage current decreases, but manufacturing process becomes more complex
Solution Approach 1:
The patent makes the polysilicon film perform multiple functions: it serves as an impurity source for emitter layer formation, acts as a stress buffer for the contact plug, and functions as a barrier layer. This multi-functionality reduces leakage current and stress while minimizing the increase in manufacturing complexity by combining multiple benefits into a single layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved RBSOA capacity by preventing hole accumulation and reducing leakage current, stabilizing the junction and increasing the non-destructive performance under reverse bias, while also enabling miniaturization of the cell structure and reducing defects in the Si substrate.
Implementation Method 1
diffusing the impurity from the polysilicon film into the body layer to form an emitter layer of a first conductivity type on the body layer
Data Source
AI summary
A method for manufacturing a vertical trench IGBT includes: forming a body layer of a second conductivity type on a semiconductor substrate of a first conductivity type; forming a trench passing through the body layer; forming a trench gate in the trench via a gate insulating film; forming a polysilicon film containing an impurity of a first conductivity type on the body layer; diffusing the impurity from the polysilicon film into the body layer to form an emitter layer of a first conductivity type on the body layer; and forming a collector layer of a second conductivity type on a lower surface of the semiconductor substrate.