Vertical Trench MOS Fabrication Reducing Gate-Drain Capacitance
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Solution Overview
Problem
Conventional trench MOS transistor fabrication methods result in increased capacitance between the gate and substrate, leading to decreased switching speed and potential degradation of semiconductor device characteristics due to keyholes formed during thermal oxidation processes.
Innovation Solution
A method involving the formation of a dielectric layer with a width less than the trench, using a thermal oxidation process to fill a second trench etched under the first trench, and removing keyholes by depositing a sacrificial layer to convert it into the same dielectric layer, thereby reducing capacitance and preventing device degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a diffused oxide layer with width greater than the trench is formed to minimize capacitance between gate electrode and drain region, then capacitance between gate and drain is reduced, but capacitance between gate and substrate increases and switching speed decreases
Solution Approach 1:
The oxide layer is segmented into two distinct regions: a first oxide layer filling the trench with width equal to the trench width, and a second oxide layer with width less than the trench width. This segmentation allows the first oxide layer to minimize gate-drain capacitance while the second oxide layer reduces gate-substrate capacitance, thereby resolving the contradiction between reducing capacitance and maintaining switching speed.
2Ease of manufacture
If thermal oxidation process is used to form diffused oxide layer, then oxide layer is formed, but keyholes are created in the oxide layer causing device characteristics to degrade
Solution Approach 1:
A sacrificial layer is deposited beforehand in the second trench before performing the thermal oxidation process. This preliminary action prevents keyhole formation during oxidation by providing a foundation that supports uniform oxide growth, thereby maintaining device characteristics while still enabling oxide layer formation through thermal oxidation.
Solution Approach 2:
The sacrificial layer acts as an intermediary between the substrate and the oxide layer during the thermal oxidation process. It mediates the oxidation process to prevent keyhole formation, allowing the oxide layer to be formed without degrading device characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach decreases capacitance between the gate and drain region, increases switching speed, and prevents semiconductor device characteristic degradation by addressing keyhole issues, resulting in improved performance and reliability.
Implementation Method 1
forming a dielectric layer, which fills the second trench, by performing a thermal oxidation process
Data Source
AI summary
A method for fabricating a semiconductor device may include: forming an outer trench, including: a first trench, and a second trench formed under the first trench, the second trench being formed by etching a substrate, forming a dielectric layer, which fills the second trench, by performing a thermal oxidation process, such that a width of the second trench is less than a width of the first trench, forming a gate dielectric layer along a surface of a semiconductor structure including the dielectric layer, and forming a gate electrode, which fills a remaining portion of the outer trench, over the gate dielectric layer.