Vertical Trench MOSFET Layout for Compact High-Voltage Drift Regions
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Solution Overview
Problem
Existing semiconductor technologies face challenges in reducing the area occupied by extended drain metal oxide semiconductor (MOS) transistors while maintaining desired on-state resistance and breakdown potential, particularly in integrating a vertically oriented drift region using planar processing without increasing fabrication complexity and cost.
Innovation Solution
The formation of deep trench structures to define vertical drift regions bounded by RESURF regions, with trench gates and optional buried drain contact layers to provide drain connections, allowing for a vertical drain extended MOS transistor configuration that reduces transistor area and enhances drain current capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a vertically oriented drift region is integrated using planar processing, then the transistor area is reduced, but the fabrication complexity and cost increase
Solution Approach 1:
The drift region is reconfigured from a lateral orientation to a vertical orientation, changing the dimension of current flow. This vertical configuration allows the drift region to extend downward from the surface, reducing the lateral footprint of the transistor while maintaining the required drift length for breakdown voltage. The vertical orientation is achieved through selective epitaxial growth and doping processes that create a three-dimensional structure from a planar substrate.
Solution Approach 2:
The drift region is segmented into multiple zones with different doping concentrations and types. By dividing the drift region into sections with varying impurity profiles (e.g., lightly doped n-type region, heavily doped n-type region, p-type body region), the patent achieves the required breakdown voltage and on-state resistance characteristics while maintaining a compact vertical structure. This segmentation allows independent optimization of different regions for their specific functions.
2Area of stationary object
If the transistor area is reduced, then the area efficiency improves, but the on-state resistance and breakdown potential performance may deteriorate
Solution Approach 1:
Different regions of the transistor are assigned different doping qualities and concentrations optimized for their specific functions. The drift region has a graded impurity profile with lighter doping near the drain for high breakdown voltage and heavier doping near the source for lower on-state resistance. The body region, source region, and drain region each have locally optimized doping characteristics that collectively achieve both low on-state resistance and high breakdown potential in a reduced area.
Solution Approach 2:
The patent employs precise control of doping parameters (concentration, depth, distribution) and geometric parameters (drift region length, junction depths) to optimize performance. By changing the impurity profile parameters along the vertical axis of the drift region, the patent achieves a breakdown voltage of at least 600 V while maintaining low on-state resistance. The vertical drain extended structure with controlled junction depths allows independent tuning of breakdown voltage and on-state resistance.
Data Source
AI summary
A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.


