Vertical Trench Semiconductor Structure With LOCOS-Guided Polysilicon Etch
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Solution Overview
Problem
Existing vertical semiconductor devices face challenges in achieving reproducible breakdown voltage and low specific on-resistance due to variations in polysilicon and dielectric liner depth during the fabrication process, complicating manufacturability and device performance.
Innovation Solution
A method involving Local Oxidation of Silicon (LOCOS) and interferometric end point detection is employed to form ledges inside vertical trenches, followed by precise etching of polysilicon using interferometric end point detection to control etch depth, ensuring consistent polysilicon and dielectric liner depth across the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If timed etch process is used to etch polysilicon and dielectric liner, then the manufacturing process is simple, but the depth of polysilicon and dielectric liner varies across the wafer
Solution Approach 1:
The patent replaces the mechanical/timed etch process with an optical measurement system (interferometric end point detection) to monitor and control the etching process in real-time, substituting a simple timed process with a precision optical feedback system
Solution Approach 2:
The patent implements feedback control by using interferometric end point detection to monitor the etching process and automatically adjust or terminate the etch when the desired depth is reached, ensuring consistent polysilicon and dielectric liner depth across the wafer
2Reliability
If trench depth and vertical source polysilicon region depth are increased to achieve higher voltage rating, then the breakdown voltage increases, but the process control difficulty increases
Solution Approach 1:
The patent replaces complex timed etch process control with optical interferometric measurement, enabling precise control of deep trench and polysilicon region depths without increasing process control complexity
Solution Approach 2:
The interferometric end point detection system automatically determines when the etching process should stop, making the process self-regulating and eliminating the need for complex external control mechanisms even for deep structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances process control, reducing variations in polysilicon and dielectric liner depth, thereby improving breakdown voltage and reducing specific on-resistance, leading to more reliable and reproducible semiconductor device performance.
Implementation Method 1
performing a LOCal Oxidation of Silicon, LOCOS, process in a vertical trench of a semiconductor material such that oxide material is formed inside the vertical trench
Implementation Method 2
etching said polysilicon downward up to the oxide material using interferometric end point detection
Data Source
AI summary
A method of creating a vertical semiconductor device, the method includes the steps of performing a LOCal Oxidation of Silicon, LOCOS, process in a vertical trench of a semiconductor material so that oxide material is formed inside the vertical trench, and ledges are formed by the oxide material, inside the vertical trench, as a result of the LOCOS process, so that a lower region of reduced lateral distance is formed between the oxide material, at a base of the trench, depositing the trench with polysilicon and etching the polysilicon downward up to the oxide material using interferometric end point detection, so that polysilicon remains in the lower region.