Vertical Trench Transistor Structure for Small-Area Channel Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving transistors with minute sizes, long channel lengths, low power consumption, and high-definition displays while maintaining reliable electrical characteristics and reduced area occupation.
Innovation Solution
The semiconductor device incorporates a specific layered structure with insulating layers and transistors that include openings and semiconductor layers positioned along the sidewalls and surfaces of electrodes, allowing for precise control of channel width and length, and includes multiple transistors sharing a common opening to optimize space and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the area occupied by transistors is reduced, then the pixel size can be reduced and definition can be increased, but the channel length becomes difficult to control and electrical characteristics deteriorate
Solution Approach 1:
The patent transitions from a planar transistor structure to a three-dimensional structure where the semiconductor layer is formed on the sidewalls of a trench. This vertical arrangement allows the channel length to be controlled by the trench depth rather than by lateral dimensions, enabling precise channel length control while occupying minimal planar area. The gate electrode is positioned above the semiconductor layer, creating a top-gate configuration that further enables precise control of the channel characteristics.
2Reliability
If the channel length is increased, then the electrical characteristics are improved, but the transistor area increases
Solution Approach 1:
The patent forms the semiconductor layer on the sidewalls of a trench rather than in a planar configuration. This allows the channel length to be extended by increasing the trench depth, which does not increase the planar footprint of the transistor. The vertical arrangement effectively decouples channel length from transistor area, enabling long channel lengths while maintaining minimal area occupation.
3Area of moving object
If multiple transistors share a common opening, then the area occupation is reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent merges multiple transistors by having them share common structural elements, specifically common source/drain electrodes and common insulating layers. Multiple transistors can be formed within a single trench structure, sharing the same opening and surrounding insulating layers, thereby reducing the overall device area. While the structure becomes more complex, the patent provides systematic manufacturing methods to handle this complexity.
Data Source
AI summary
A semiconductor device that occupies a small area is provided. The semiconductor device includes a first insulating layer, a second insulating layer, and a transistor. The transistor includes a semiconductor layer, a gate insulating layer, a gate electrode, a source electrode, and a drain electrode. The source electrode and the drain electrode are provided over the first insulating layer. The second insulating layer includes an opening reaching the first insulating layer and overlapping with part of the source electrode and part of the drain electrode. The semiconductor layer is provided in contact with a side surface of the second insulating layer in the opening, a top surface of the first insulating layer in the opening, a top surface of the source electrode, and a top surface of the drain electrode. The gate insulating layer is positioned over the semiconductor layer, the source electrode, and the drain electrode. The gate electrode overlaps with the opening and is positioned over the gate insulating layer.