Vertical Trench Field Plate VDMOS Transistor

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Solution Overview

Problem

Conventional power transistor devices face challenges in achieving a low specific on-resistance (RSP) while maintaining adequate breakdown voltage, as RSP is directly proportional to on-resistance and area, limiting the efficiency and compactness of these devices.

Innovation Solution

The design of a vertical double diffused metal-oxide semiconductor (VDMOS) transistor incorporates vertical trench field plates, allowing for increased lateral and vertical depletion, which reduces the epitaxial layer thickness or increases doping, thereby lowering RSP without compromising breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If conventional power transistor devices use traditional lateral gate and field plate structures, then the device area can be reduced, but the specific on-resistance (RSP) increases and breakdown voltage decreases

Engineering Contradiction:
Improvedevice areaVSAvoidspecific on-resistance and breakdown voltage
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent transitions from conventional lateral field plates to vertical trench field plates that extend into the epitaxial layer. This vertical dimensionality change enables increased lateral and vertical depletion regions, allowing for lower specific on-resistance (approximately 40 mΩ*mm²) and improved breakdown voltage while maintaining compact device area. The vertical trenches create additional depletion paths that were not available in planar structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention modifies the geometric parameters of the field plate structure by extending it vertically into the epitaxial layer rather than maintaining it as a lateral surface feature. This parameter change in the field plate configuration enables enhanced depletion region formation, which simultaneously reduces on-resistance and increases breakdown voltage, resolving the trade-off between device compactness and electrical performance.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If lateral depletion is increased to reduce on-resistance, then RSP decreases, but device area must increase

Engineering Contradiction:
Improvespecific on-resistanceVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The vertical trench field plates extend the depletion region formation into the vertical dimension, allowing for increased lateral depletion effect without proportionally increasing device area. The vertical trenches create concentrated field regions that enhance lateral depletion efficiency, achieving low specific on-resistance in a compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

By changing the field plate orientation from lateral to vertical, the invention intensifies the depletion effect in a more space-efficient manner. The vertical configuration creates stronger field concentrations that enhance lateral depletion without requiring proportional area increases, thus reducing specific on-resistance while maintaining device compactness.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The VDMOS transistor achieves a lower specific on-resistance (approximately 40 mΩ*mm²) with improved breakdown voltage, enabling more efficient and compact power transistor designs.

Implementation Method 1

The vertical trench field plates allow lateral and vertical depletion to occur along their vertical surfaces

Methodology Applied
Scientific EffectDepletion region formation: Electric Field

Data Source

PatentUS7671408B2Vertical drain extended MOSFET transistor with vertical trench field plate
Publication Date: 2010.03.02 TEXAS INSTRUMENTS INC
  • US7671408B2 patent drawing
  • US7671408B2 patent drawing
  • US7671408B2 patent drawing

AI summary

A vertical drain extended metal-oxide semiconductor field effect (MOSFET) transistor or a vertical double diffused metal-oxide semiconductor (VDMOS) transistor includes: a buried layer having a first conductivity type in a semiconductor backgate having a second conductivity type; an epitaxial (EPI) layer having the first conductivity type and formed above the buried layer; a deep well having the first conductivity type in the EPI layer extending down to the buried layer; at least one shallow well having the second conductivity type in the EPI layer; a shallow implant region having the first conductivity type and formed in the shallow well; a gate electrode having a lateral component extending over an edge of the shallow well and stopping at some spacing from an edge of the shallow implant and having a vertical trench field plate extending vertically into the EPI layer.