Vertical-Wall Via Interconnects for High-Density Substrates

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Solution Overview

Problem

There is a need to increase the number of interconnects through a substrate while maintaining smaller package sizes, as existing technologies struggle to achieve higher density interconnects without compromising the size and performance of packages.

Innovation Solution

The use of substrates with dielectric layers and via interconnects featuring approximately vertical walls allows for higher density interconnects by eliminating the need for pad interconnects, enabling closer placement of interconnects and improved performance in packages with integrated devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional pad interconnects are used, then reliability is improved, but device complexity and package size increase

Engineering Contradiction:
Improveinterconnect reliabilityVSAvoidinterconnect structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the pad interconnect element from the traditional interconnect structure. By removing the pad and directly connecting via interconnects between metal layers, the design simplifies the interconnect architecture while maintaining electrical functionality, thereby reducing device complexity without sacrificing reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the interconnect function into discrete via interconnects that can be directly coupled between metal layers without requiring pad intermediaries. This segmentation allows for more flexible and compact interconnect routing, reducing overall structure complexity while preserving signal integrity and reliability

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If via interconnects with tapered walls are used, then ease of manufacture is improved, but interconnect density decreases

Engineering Contradiction:
Improvevia formation easeVSAvoidinterconnect density
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent changes the geometric parameter of the via wall from tapered to approximately vertical. This parameter change enables closer spacing between via interconnects, increasing interconnect density. The vertical wall profile is achieved through controlled deposition processes that maintain manufacturability while enabling higher density configurations

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent transitions from horizontal spacing considerations to vertical wall profiling, utilizing the vertical dimension to achieve closer horizontal spacing. By forming via interconnects with vertical walls, the design exploits the vertical dimension during deposition to enable tighter horizontal pitch, thereby increasing overall interconnect density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If more interconnects are added to increase density, then productivity is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveinterconnect throughputVSAvoidvia alignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the interconnect system into multiple discrete via interconnects with standardized dimensions and spacing. This segmentation allows for modular fabrication processes where each via can be formed with consistent precision requirements, enabling higher overall density without proportionally increasing individual via manufacturing difficulty

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent standardizes via interconnect parameters including diameter, spacing, and depth to achieve uniform manufacturing conditions. By maintaining consistent via dimensions and vertical wall profiles across all interconnects, the design enables higher density configurations while keeping manufacturing precision requirements within achievable limits through process control

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250096091A1Package comprising a substrate with via interconnect with vertical walls
Publication Date: 2025.03.20 QUALCOMM INC
  • US20250096091A1 patent drawing
  • US20250096091A1 patent drawing
  • US20250096091A1 patent drawing

AI summary

A substrate comprising at least one dielectric layer, and a plurality of interconnects located at least partially in the at least one dielectric layer, wherein the plurality of interconnects include a plurality of via interconnects, and wherein the plurality of via interconnects include a first via interconnect comprising a first via wall that is approximately vertical.