Vertical Wire Antenna-in-Package for Compact Millimeter-Wave RF

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Solution Overview

Problem

Existing antenna-in-package arrangements for semiconductor devices are not compact enough for various applications, particularly in high-frequency millimeter-wave RF products used in the automotive and consumer electronics sectors.

Innovation Solution

The integration of rectilinear wire antennas within semiconductor device packages, such as Quad-Flat No-Lead (QFN), Ball-Grid-Array (BGA), or Wafer Level Chip Scale Package (WLCSP) using wire bonding technology, where a cavity is drilled in the package molding compound to expose a redistribution layer, forming a vertical wire antenna that maintains its shape and orientation, and is encapsulated with insulating material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If loop wire bond antennas or planar antennas are used in BGA packages, then antenna functionality is achieved, but the device size becomes too large for compact applications

Engineering Contradiction:
Improveantenna sizeVSAvoidRF performance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent transitions from planar/loop antenna configurations to a vertical wire antenna structure that extends in the Z-direction (perpendicular to the substrate). This dimensional change allows the antenna to achieve resonant lengths suitable for millimeter-wave frequencies without increasing the planar footprint, thereby reducing overall device volume while maintaining RF performance through proper vertical positioning and grounding.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The vertical wire antenna is nested within the existing package structure, utilizing the space above the substrate and between package components. The antenna wire is positioned vertically from the substrate surface, effectively using the third dimension (height) that was previously unused, thus achieving compact integration without compromising antenna functionality.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Volume of moving object

If vertical wire antennas are implemented in WLCSP packages, then compactness is improved, but manufacturing complexity increases due to cavity drilling and wire bonding requirements

Engineering Contradiction:
Improvepackage sizeVSAvoidmanufacturing process
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into distinct steps: cavity formation through drilling, wire antenna bonding to exposed RDL, and encapsulation material filling. This segmentation allows each step to be optimized independently and enables the use of existing manufacturing capabilities (drilling, wire bonding, molding) rather than requiring entirely new processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The vertical wire antenna structure serves multiple functions: it acts as the radiating element, provides a compact form factor for WLCSP packages, and utilizes existing package components (RDL, encapsulation material) as part of the antenna system. The metallic parts of the package are leveraged as ground planes and feed lines, reducing the need for additional dedicated components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11915989B2Semiconductor device and corresponding manufacturing method
Publication Date: 2024.02.27 STMICROELECTRONICS SRL
  • US11915989B2 patent drawing
  • US11915989B2 patent drawing
  • US11915989B2 patent drawing

AI summary

An antenna-in-package semiconductor device includes a semiconductor chip coupled to a planar substrate. An encapsulation body encapsulates the semiconductor chip. The encapsulation body includes a through cavity extending to the planar substrate. A rectilinear wire antenna is mounted within the through cavity and extends, for instance from the planar substrate, along an axis that is transverse to a surface of the planar substrate to which the semiconductor chip is coupled. The rectilinear wire antenna is electrically coupled to the semiconductor chip. An insulating material fills the cavity to encapsulated the rectilinear wire antenna.