Vertical Semiconductor Wiring With Protected Through-Contact Etching

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Solution Overview

Problem

Existing methods for creating through-contacts in semiconductor components, such as those used in x-ray detectors, often damage the structure of the sensor chip and compromise the electrical integrity, making testing and production challenging.

Innovation Solution

A method involving a blind hole-like recess creation, followed by selective etching and insulation layer application, protects the first electrical insulation layer during anisotropic etching, ensuring the integrity of the semiconductor component and enabling robust conductor tracks and test contacts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through contacts are created by direct etching methods, then electrical connections are established, but the sensor chip structure is damaged and electrical integrity is compromised

Engineering Contradiction:

Improveelectrical integrityVSAvoidstructure damage

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by creating a blind hole-like recess before forming the through contact. This recess serves as a pre-prepared structure that guides the etching process and protects surrounding areas, preventing damage to the sensor chip structure while enabling subsequent through contact formation without compromising electrical integrity

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the through contact formation process into distinct stages: first creating a blind hole-like recess, then selectively etching through the insulation layers. This segmentation allows each stage to be optimized independently, with the recess stage protecting the sensor chip structure and the etching stage establishing electrical connections

Inventive Principle:

Principle #1Segmentation

2Reliability

If wiring is added to enable electrical connections, then electrical capability is maintained, but the active pixel surface area is reduced

Engineering Contradiction:

Improveelectrical capabilityVSAvoidactive pixel surface

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies local quality by concentrating wiring and electrical connections to specific localized areas (through contacts in recesses) rather than distributing wiring across the entire sensor chip surface. This allows the majority of the surface to remain active for pixel detection while maintaining necessary electrical connections in dedicated locations

Inventive Principle:

Principle #3Local quality

3Ease of manufacture

If conventional etching methods are used, then through contacts are formed, but insulation layers are damaged and testability is reduced

Engineering Contradiction:

Improvethrough contact formationVSAvoidinsulation layer integrity

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a blind hole-like recess before etching the insulation layers. This pre-formed recess acts as a containment structure that directs the etching process vertically, preventing lateral etching damage to insulation layers and maintaining manufacturing precision while enabling through contact formation

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The blind hole-like recess serves as an intermediary structure between the sensor chip and the through contact. It mediates the etching process by providing a defined pathway that protects surrounding insulation layers while allowing conductor material to reach the active circuitry, thus maintaining both ease of manufacture and manufacturing precision

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the testability and mechanical stability of semiconductor components during manufacturing, preventing damage to insulation layers and ensuring reliable electrical connections.

Implementation Method 1

an anisotropic vertical etching takes place, i.e. transverse to the layer sequence of the second electrical insulation layer, until the contact surface is revealed

Methodology Applied

Scientific EffectAnisotropic etching:

Data Source

PatentUS20250239489A1Vertical wiring of a semiconductor component

Publication Date: 2025.07.24 SIEMENS HEALTHINEERS AG

AI summary

A semiconductor component includes a semiconductor substrate, a first electrical insulation layer on a front side, a second electrical insulation layer on the first electrical insulation layer, and a contact surface for the semiconductor substrate in or on the second electrical insulation layer. A method for making a recess for a through contact comprises: creating a blind hole-like recess through the semiconductor substrate to the first electrical insulation layer; removing the first electrical insulation layer within the blind hole-like recess; expanding the blind hole-like recess in a direction towards the contact surface by partially removing the second electrical insulation layer; applying a third electrical insulation layer to inner walls of the expanded recess, wherein the first electrical insulation layer is covered up to the expanded recess; and anisotropic etching the second electrical insulation layer towards the contact surface until the contact surface for the semiconductor substrate is revealed.