Vertically Oriented Nanosheets for Gate-All-Around FETs

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Solution Overview

Problem

The fabrication of gate-all-around FETs is challenging due to the difficulty in patterning between conventional horizontally oriented nanosheets, which results in large undercut areas and inefficient removal of work function metals, especially when the N-to-P spacer is reduced and the width of nanosheets increases.

Innovation Solution

The formation of vertically oriented nanosheets, which requires a lower wet etch budget to remove exposed work function metals, preventing undesired removal of non-targeted work function metal and improving electrostatic control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional horizontally oriented nanosheets are used, then the device structure is simpler to form, but large undercut areas occur and work function metals cannot be efficiently removed

Engineering Contradiction:
Improvework function metal removal precisionVSAvoidnanosheet orientation structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent transitions from conventional horizontal nanosheet orientation to vertical nanosheet orientation, changing the spatial dimension of the channel structure. This dimensional change allows the gate to wrap around the nanosheet from all directions (gate-all-around configuration), providing superior electrostatic control and enabling precise work function metal removal without large undercut areas.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Power

If N-to-P spacer is reduced to increase nanosheet width, then drive current increases, but patterning difficulty increases and work function metal removal becomes inefficient

Engineering Contradiction:
Improvedrive currentVSAvoidpatterning precision
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

By orienting nanosheets vertically rather than horizontally, the patent enables better gate control over the channel. This allows for reduced spacer dimensions and increased nanosheet width without sacrificing patterning precision, as the vertical orientation provides superior electrostatic control and eliminates the undercut issues that plague horizontal configurations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate-all-around configuration provides localized electrostatic control at different positions around the vertical nanosheet channel. This enables precise control of carrier injection and work function metal removal at specific locations, allowing reduced spacer dimensions while maintaining manufacturing precision.

Inventive Principle:
Principle #3Local quality

3Loss of time

If vertically oriented nanosheets are formed, then wet etch budget is reduced and electrostatic control is improved, but fabrication process complexity increases

Engineering Contradiction:
Improvewet etch budgetVSAvoidfabrication process
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The vertical orientation of nanosheets fundamentally changes the etch geometry, allowing the etch front to access work function metals more directly without having to navigate around large horizontal structures. This reduces the wet etch budget required while the gate-all-around formation process, though more complex, provides long-term benefits in device performance and control.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11094781B2Nanosheet structures having vertically oriented and horizontally stacked nanosheets
Publication Date: 2021.08.17 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11094781B2 patent drawing
  • US11094781B2 patent drawing
  • US11094781B2 patent drawing

AI summary

A nanosheet semiconductor structure and method for forming the same, where the nanosheet semiconductor structure includes a substrate and a nanosheet stack comprising vertically oriented nanosheets. A gate structure contacts and wraps around the vertically oriented nanosheets. A source layer and a drain layer are each disposed adjacent to the nanosheet stack. An inner spacer is disposed in contact with a bottom surface of the nanosheet stack. The method includes forming an alternating pattern of first spacers and second spacers on a semiconductor stack. The first spacers and one or more underlying portions of the semiconductor stack are removed thereby forming a plurality of trenches each adjacent to one or more of the second spacers. The plurality of trenches defines a plurality of vertically oriented nanosheets. A plurality of sacrificial spacers are formed each in contact with one or more vertically oriented nanosheets of the plurality of vertically oriented nanosheets.