Vertical Fin FET Bottom Source Drain Epitaxy
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Solution Overview
Problem
Current vertical fin-shaped field effect transistors (VFETs) face challenges in forming an aligned bottom junction during fabrication, as etching does not guarantee stopping at the edge of the highly doped source/drain layer, leading to incomplete coverage of the fin end and requiring high temperature for dopant drive, resulting in poor junction gradient and resistance.
Innovation Solution
The method involves forming fins on a substrate, creating an interlevel dielectric layer, selectively removing it between adjacent fins, laterally recessing the substrate to form a bottom source/drain cavity, and epitaxially growing a bottom source/drain region underneath the fins, improving the junction gradient and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If etching is used to form the bottom source/drain region, then the fabrication process is simple, but the etching does not guarantee stopping at the edge of the highly doped source/drain layer, leading to incomplete coverage of the fin end
Solution Approach 1:
The patent performs preliminary actions by forming a bottom source/drain cavity before growing the bottom source/drain epitaxial layer. The cavity is formed by removing interlevel dielectric material and laterally recessing the substrate, creating a predefined space that ensures the subsequent epitaxial growth will properly cover the fin ends. This preliminary cavity formation resolves the alignment precision issue while maintaining fabrication simplicity through standardized semiconductor processing steps.
Solution Approach 2:
The patent introduces an intermediary structure - the bottom source/drain cavity - that mediates between the etching process and the final bottom source/drain region formation. This cavity acts as a template or mold that guides the epitaxial growth to achieve proper alignment and coverage. The intermediary cavity ensures that the bottom source/drain epitaxial layer is deposited precisely where needed, solving the alignment precision problem without complicating the overall fabrication process.
2Reliability
If high temperature is used for dopant drive, then the dopant can be driven into the substrate, but the junction gradient becomes poor and resistance increases
Solution Approach 1:
The patent changes the fundamental parameter of how the bottom source/drain region is formed - transitioning from a dopant drive-in process to an epitaxial growth process. By growing the bottom source/drain region epitaxially from the substrate in the bottom source/drain cavity, the patent achieves both reliable dopant incorporation and precise junction gradient control. The epitaxial growth process allows for controlled doping during growth, providing superior junction gradient compared to high-temperature drive-in methods.
3Productivity
If the bottom source/drain region is formed without a cavity, then the fabrication process is shorter, but the fin ends are not completely covered by the bottom source/drain epitaxial layer
Solution Approach 1:
The patent performs the preliminary action of forming the bottom source/drain cavity before epitaxial growth. This cavity is created by removing interlevel dielectric material and laterally recessing the substrate between adjacent fins. By establishing this cavity beforehand, the subsequent epitaxial growth of the bottom source/drain region is ensured to completely cover the fin ends, as the growth occurs within the confines of the pre-formed cavity structure.
Solution Approach 2:
The patent addresses the coverage completeness issue by working in another dimension - creating the bottom source/drain cavity that extends beyond the fin ends in the lateral direction. This dimensional approach ensures that when the bottom source/drain epitaxial layer is grown, it has sufficient lateral extent to completely cover the fin ends, solving the coverage problem without significantly extending the fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures complete coverage of the fin ends with the bottom source/drain epitaxial layer, enhancing the bottom junction gradient and resistance, thereby improving the performance of VFETs.
Implementation Method 1
epitaxially growing an epitaxial growth material from the substrate and filling the bottom source/drain cavity
Data Source
AI summary
A vertical field effect transistor structure having at least two vertically oriented fins extending from a substrate. The vertical field effect transistor structure further includes a first source/drain region disposed in the substrate between the two vertically oriented fins and under each of the fins. The outer ends of the first source/drain region are in contact with outer ends of the fins. A portion of the first source/drain region extends beyond the fins.