VFET Diffusion Break Structure With Dual Isolation Layers

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Solution Overview

Problem

Existing VFET devices face challenges in manufacturing processes that lead to defects due to differences in pattern density and properties between diffusion breaks and active regions, causing complications and defects during fabrication.

Innovation Solution

The integration of a diffusion break structure with dual isolation layers and dummy channel regions in VFET devices, which includes a diffusion break channel region protruding from the substrate and isolation layers on opposing sidewalls, helps maintain electrical isolation and reduces defects by minimizing the formation of top and bottom source/drain regions on the diffusion break channel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a diffusion break is formed between active regions in VFET devices, then electrical isolation between regions is improved, but defects occur due to differences in pattern density and properties between the diffusion break and active regions

Engineering Contradiction:
Improveelectrical isolationVSAvoiddefect rate
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A dummy channel region is introduced as an intermediary structure between the diffusion break and the active region. This dummy channel region has properties similar to the active region channel, serving as a transition zone that reduces the abrupt property differences between the diffusion break and active region, thereby minimizing defects while maintaining electrical isolation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy channel region is specifically positioned only in areas where property transitions are needed (between diffusion break and active region), rather than uniformly throughout the device. This localized application maintains electrical isolation where needed while reducing defects at transition zones

Inventive Principle:
Principle #3Local quality

2Reliability

If dual isolation layers are added to the diffusion break structure, then electrical isolation and defect reduction are improved, but device complexity increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidisolation layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation structure is segmented into dual isolation layers with distinct functions: a first isolation layer that provides primary electrical isolation and a second isolation layer that provides additional isolation and defect reduction. This segmentation allows each layer to be optimized for its specific function, improving overall reliability while managing complexity through functional division

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12376352B2Integrated circuit devices including a vertical field-effect transistor and methods of forming the same
Publication Date: 2025.07.29 SAMSUNG ELECTRONICS CO LTD
  • US12376352B2 patent drawing
  • US12376352B2 patent drawing
  • US12376352B2 patent drawing

AI summary

Integrated circuit devices and methods of forming the same are provided. Integrated circuit devices may include a first active region including a first vertical field effect transistor (VFET), a second active region including a second VFET, and a diffusion break between the first active region and the second active region on a substrate. The diffusion break may include first and second isolation layers in the substrate and a diffusion break channel region protruding from a portion of the substrate. The portion of the substrate may be between the first isolation layer and the second isolation layer. In some embodiments, the first and second isolation layers may be adjacent to respective opposing sidewalls of the diffusion break channel region.