VFET Strained Channel Extension Defect Management

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Solution Overview

Problem

Vertical field effect transistors (VFETs) face performance and reliability issues due to crystal defects in the strained channel region, particularly at the interface of the SiGe layer and dielectric spacers, which can negatively impact device performance and reliability.

Innovation Solution

The method involves forming recesses in the fin structure and creating an extension region using dopants driven-in from the source/drain, which collects defects away from the channel region, thereby reducing their impact on performance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a strained channel region is formed in a vertical field effect transistor, then transistor performance is improved, but crystal defects are generated at the interface of the SiGe layer and dielectric spacers

Engineering Contradiction:

Improvetransistor performanceVSAvoidcrystal defects

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The fin structure is segmented into three distinct regions: a first portion forming the channel region, a second portion forming the extension region, and a third portion forming the unstrained region. This segmentation allows the strained channel region to provide improved transistor performance while the extension region captures and isolates crystal defects that form during the strain introduction process, preventing them from degrading device reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The extension region acts as an intermediary between the strained channel region and the unstrained fin region. It serves as a buffer zone that absorbs the mechanical stress and captures crystal defects generated during strain introduction, thereby protecting the channel region from defect propagation while maintaining the performance benefits of strain.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If SiGe layer is introduced to create strain in the channel, then carrier mobility is enhanced, but interface defects are created at the SiGe-dielectric spacer boundary

Engineering Contradiction:

Improvecarrier mobilityVSAvoidinterface defects

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

Different regions of the fin structure are assigned different qualities and functions: the first portion has strained quality for high carrier mobility, the second portion has intermediate quality to capture interface defects, and the third portion has unstrained quality. This local differentiation allows the SiGe layer to enhance carrier mobility in the channel while isolating interface defects in the extension region away from the active channel.

Inventive Principle:

Principle #3Local quality

3Productivity

If the channel region is formed directly on the fin, then device density is maximized, but defects in the channel region negatively impact performance

Engineering Contradiction:

Improvedevice densityVSAvoidperformance

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The fin is segmented to create a three-region structure that maintains high device density while improving reliability. The channel region remains compact for high density, but the added extension region captures defects without significantly increasing the overall device footprint, thus maintaining productivity while enhancing performance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The crystal defects that would normally harm channel performance are converted into a beneficial feature by redirecting them to the extension region. The extension region acts as a defect sink, capturing interface defects during strain introduction and preventing them from degrading channel performance, thereby converting a harmful byproduct into a protective mechanism.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively moves potential defect sites to a portion of the semiconductor device with decreased impact on performance and reliability, improving the overall performance of VFET structures by reducing defects in the channel region.

Implementation Method 1

defects are collected within the extension regions from the channel region in the first portion of the fin

Methodology Applied

Scientific EffectDiffusion: Diffusion

Data Source

PatentUS10453940B1Vertical field effect transistor with strained channel region extension

Publication Date: 2019.10.22 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

According to one or more embodiments of the present invention, a method for forming a fin structure for a semiconductor device includes forming a fin. The method further includes recessing a first portion of the fin to form a recess in the fin. The method further includes forming a channel region in the first portion of the fin. The method further includes forming an extension region on a second portion of the fin, and wherein defects are collected within the extension regions from the channel region in the first portion of the fin.