Variable Gain Amplifier Common-Mode Servo for Better Linearity
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Solution Overview
Problem
Cascaded variable gain amplifier (VGA) stages in communication systems face limitations due to direct coupling between stages, leading to shared common mode voltage levels, which degrade linearity at lower gain states and restrict design parameters, often requiring additional stages to achieve the required gain.
Innovation Solution
A common-mode bias servo stage with closed-loop differential amplifiers is introduced, which compares output voltage to a reference voltage to generate a DC bias voltage, fed back to the differential signal output node, effectively reducing or eliminating common mode output current, allowing only AC signals to pass through the resistive loads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If direct coupling between VGA stages is used, then device complexity is reduced, but linearity degrades at lower gain states due to shared common mode voltage levels
Solution Approach 1:
The patent segments the common mode voltage path from the differential signal path by introducing separate common mode voltage generation circuits for each VGA stage. This allows independent control of common mode levels at each stage while maintaining direct coupling for differential signals, thus preserving both simplicity and linearity.
Solution Approach 2:
The patent introduces common mode voltage generation circuits as intermediary elements that mediate between the power supply and the differential pairs. These circuits generate appropriate common mode voltages that compensate for the shared common mode levels caused by direct coupling, thereby maintaining linearity without adding complex coupling structures.
2Power
If additional VGA stages are added to achieve required gain, then gain requirement is met, but device complexity and number of components increase
Solution Approach 1:
The patent changes the operating parameters of each VGA stage by independently controlling their common mode voltages. This optimization allows each stage to operate at its maximum efficiency point, extracting the highest possible gain from each stage and reducing the total number of stages needed to achieve the required overall gain.
3Object-affected harmful factors
If resistive load or bias current is increased to reduce common mode voltage, then common mode voltage level improves, but design constraints increase and optimal design is compromised
Solution Approach 1:
The patent makes the common mode voltage levels dynamic and adjustable through separate control circuits for each VGA stage. Instead of using fixed resistive loads or bias currents that constrain the design, the common mode voltages can be dynamically optimized for different operating conditions, maintaining design flexibility while controlling common mode levels.
Data Source
Figure 1
Figure 2~3
AI summary
A variable gain amplifier for amplifying a differential pair of input voltage signals, comprising a control input for receiving a differential pair of gain control voltage signals, a differential signal input for receiving a differential pair of input voltage signals, a current commuting stage receiving the pair of input voltage signals and the gain control voltage, and comprising a pair of cascode circuits for providing a differential pair of current components of respective current amounts that depend on the respective input voltage signal and on the received gain control voltage, a differential load stage receiving the current components and having respective resistive loads of a respective load resistance amount for generating a differential pair of output voltage signals having respective output voltage amounts that depend on the respective current amounts and on the load resistance amounts and a differential signal output having respective differential signal output nodes for providing the differential pair of output voltage signals, wherein the variable gain amplifier further comprises a common-mode bias servo stage that receives a reference voltage of a reference voltage amount and the differential pair of output voltage signals, and that comprises a pair of closed loop differential amplifiers, each configured to generate a respective DC bias voltage of a DC bias voltage amount depending on a difference between the respective output voltage amount and the reference voltage amount, and each feeding the respective generated DC bias voltage back to the respective differential signal output node.