Vgs Replication Circuit for Transistor Bias Consistency

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Solution Overview

Problem

Existing transistor bias circuits face challenges in maintaining consistent operation due to manufacturing variations and temperature/power supply voltage changes, which affect the threshold voltage of transistors, leading to inconsistent performance across different conditions.

Innovation Solution

The proposed solution involves a Vgs replication circuit that uses a diode-connected NMOS transistor to generate a bias voltage, which is then replicated across complementary PMOS transistors, ensuring that both types of transistors operate with matched source-to-gate voltages, even under varying conditions, by using a current source to maintain the threshold voltage across the source and gate terminals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a constant gate-to-source voltage is applied to bias a transistor, then the transistor operates in a particular fashion, but the bias becomes inconsistent due to manufacturing variations and temperature/power supply voltage changes

Engineering Contradiction:
Improvebias consistencyVSAvoidthreshold voltage variation
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent uses a diode-connected transistor to generate a reference voltage that is copied to multiple other transistors through voltage replication. This copying mechanism ensures that all transistors receive the same bias voltage, compensating for manufacturing variations and environmental changes affecting threshold voltages.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The diode-connected transistor configuration creates a feedback mechanism where the gate voltage is fed back to the drain, automatically adjusting the bias voltage to maintain consistent operation despite variations in threshold voltage due to temperature or manufacturing differences.

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If different transistor types (NMOS and PMOS) are used in the circuit, then circuit functionality is enhanced, but maintaining matched bias voltages becomes difficult due to threshold voltage mismatches

Engineering Contradiction:
Improvetransistor type flexibilityVSAvoidbias voltage matching
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent implements a universal bias generation circuit that can provide matched gate-to-source voltages to both NMOS and PMOS transistors simultaneously. The diode-connected reference transistor generates a bias voltage that is replicated across different transistor types, ensuring consistent operation despite their inherently different threshold voltage characteristics.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If bias circuits are added to compensate for threshold voltage variations, then transistor operation consistency improves, but circuit complexity increases

Engineering Contradiction:
Improveoperation consistencyVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the bias generation function with the existing transistor structure by using a diode-connected transistor configuration. This integration approach allows the circuit to generate and distribute bias voltages without requiring separate, complex bias generation circuits, thus improving operation consistency while minimizing additional complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7676213B2Vgs replication apparatus, method, and system
Publication Date: 2010.03.09 TAHOE RES LTD
  • US7676213B2 patent drawing
  • US7676213B2 patent drawing
  • US7676213B2 patent drawing

AI summary

A gate-to-source voltage (Vgs) replication circuit includes a diode-connected NMOS transistor coupled to a current source to draw a drain-to-source current therethrough. The generated Vgs is imposed across a source-to-gate junction of a PMOS transistor. A second PMOS transistor is coupled in series with the first PMOS transistor such that the source-to-gate voltage (Vsg) of the second PMOS transistor replicates the Vgs of the NMOS circuit. The second PMOS transistor is coupled as a source follower to bias other NMOS transistors.