Dual-Layer vHF Etch Barrier for CMOS MEMS Reliability
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Solution Overview
Problem
In CMOS MEMS systems, existing vapor phase HF etching methods damage inter-metal dielectrics due to the corrosiveness of vapor phase HF, and previous barrier solutions, such as metallic and ceramic films, are either prone to electrical shorts or cracking on non-planar surfaces, leading to unreliable protection.
Innovation Solution
A dual-layer vHF etch barrier structure comprising a malleable stress reduction layer with a lower Young's modulus and a brittle, high-vHF-resistant barrier layer with a higher Young's modulus, which provides structural integrity and protects the CMOS devices from vapor phase HF etching while tolerating stress and warpage during fabrication processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vapor phase HF etching is used to remove sacrificial material, then etching speed and completeness are improved, but inter-metal dielectrics are damaged due to corrosion
Solution Approach 1:
A barrier layer is introduced as an intermediary between the vapor phase HF etching environment and the inter-metal dielectrics. This barrier layer selectively resists HF etching while allowing the etching process to proceed on the sacrificial material, thereby protecting the dielectrics from corrosion damage while maintaining high etching speed and completeness.
Solution Approach 2:
The patent utilizes the differential etching parameters between materials by selecting a barrier layer with specific chemical properties that exhibit high resistance to HF etching. This parameter change in material selection allows the barrier layer to withstand the corrosive HF environment while the sacrificial material is rapidly removed.
2Object-affected harmful factors
If metallic films are used as vHF protection barrier, then some resistance to vHF etching is achieved, but electrical shorts are introduced when applied as continuous layer
Solution Approach 1:
The patent employs a composite barrier structure consisting of multiple layers with different properties. The barrier layer is configured to provide HF resistance through its material composition and structural arrangement, while maintaining electrical isolation properties that prevent shorts, thus combining the benefits of both metallic and non-metallic barrier characteristics.
3Reliability
If ceramic films are used as vHF protection barrier, then electrical insulation and vHF resistance are achieved, but cracking occurs on non-planar surfaces during fabrication processes
Solution Approach 1:
The patent utilizes a thin film barrier structure that can conform to non-planar surfaces. This flexible thin film configuration allows the barrier to accommodate surface irregularities and stress during fabrication processes such as bonding, grinding, and CMP, preventing crack formation while maintaining electrical insulation and HF resistance properties.
4Device complexity
If single-layer barrier is used, then structure simplicity is maintained, but reliable protection against vHF etching cannot be achieved
Solution Approach 1:
The patent divides the barrier protection into multiple functional layers, where each layer serves a specific purpose: one layer provides HF etching resistance while another layer provides electrical insulation. This segmentation allows each layer to be optimized for its specific function, achieving reliable comprehensive protection while maintaining reasonable structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-layer vHF etch barrier structure effectively prevents damage from vapor phase HF etching, reduces cracking, and enhances yield by providing reliable protection and electrical insulation, even on non-planar surfaces, during bonding, grinding, and chemical mechanical polishing.
Implementation Method 1
The use of vapor phase HF (vHF) etching provides even faster and more complete removal of the sacrificial material than liquid phase HF
Implementation Method 2
vHF is extremely corrosive and can damage inter-metal dielectrics of typical CMOS circuits, which are not resistant to vHF
Data Source
AI summary
The present disclosure relates to an integrated microsystem with a protection barrier structure, and an associated method. In some embodiments, the integrated microsystem comprises a first die having a plurality of CMOS devices disposed thereon, a second die having a plurality of MEMS devices disposed thereon and a vapor hydrofluoric acid (vHF) etch barrier structure disposed between the first die and the second die. The second die is bonded to the first die at a bond interface region. The vHF etch barrier structure comprises a vHF barrier layer over an upper surface of the first die, and a stress reduction layer arranged between the vHF etch barrier layer and the upper surface of the first die.