Via Array Thermal Conduction for IC Die Hot Spots
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuit dies often experience heat management issues due to poor thermal conduction, particularly when placed near die stacks or within encapsulation mold compounds that are poor thermal conductors, leading to hot spots and inefficient heat dissipation.
Innovation Solution
A via array is implemented with wires coupled to the integrated circuit die's surface for heat conduction, where the wires extend through a molding material to a superior surface, facilitating thermal dissipation using interconnects and a heat sink with thermal paste for effective heat transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an integrated circuit die is placed within an encapsulation mold compound, then the die is protected and integrated into the assembly, but heat dissipation deteriorates because the mold compound is a poor thermal conductor
Solution Approach 1:
A thermally conductive underfill material is introduced as an intermediary substance between the integrated circuit die and the mold compound. This underfill material has superior thermal conductivity compared to the mold compound, creating a thermal pathway that facilitates heat dissipation from the die while maintaining the protective encapsulation structure.
Solution Approach 2:
The patent employs a composite material structure where the underfill material combines protective encapsulation properties with high thermal conductivity. This composite approach allows the assembly to simultaneously achieve die protection and effective heat dissipation by integrating materials with complementary properties.
2Productivity
If the integrated circuit die is placed next to a die stack, then the assembly achieves higher integration density, but heat dissipation becomes problematic due to limited space for thermal management structures
Solution Approach 1:
The patent transitions from planar heat dissipation approaches to a vertical/dimensional approach by extending heat dissipation structures upward from the die surface. The underfill material and associated thermal management structures create a three-dimensional thermal pathway that efficiently conducts heat away from the die in the vertical dimension, enabling effective thermal management in high-density vertical stacking configurations.
3Ease of manufacture
If conventional encapsulation methods are used, then manufacturing is simple and cost-effective, but thermal conduction capability is insufficient to manage hot spots on the die
Solution Approach 1:
The patent applies local quality enhancement by introducing the thermally conductive underfill material specifically in the region where thermal conduction is most critical - between the die and the mold compound. This localized material enhancement provides superior thermal management precisely where hot spots occur, while maintaining conventional encapsulation methods in other regions of the assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The via array effectively conducts heat away from the integrated circuit die, mitigating hot spots and improving thermal management by enhancing heat dissipation through the use of thermally conductive materials and structures.
Implementation Method 1
A via array has proximal ends of wires thereof coupled to the second upper surface for conduction of heat away from the integrated circuit die
Data Source
AI summary
In a microelectronic device, a substrate has first upper and lower surfaces. An integrated circuit die has second upper and lower surfaces. Interconnects couple the first upper surface of the substrate to the second lower surface of the integrated circuit die for electrical communication therebetween. A via array has proximal ends of wires thereof coupled to the second upper surface for conduction of heat away from the integrated circuit die. A molding material is disposed in the via array with distal ends of the wires of the via array extending at least to a superior surface of the molding material.