Via Contact Barrier Structure for Low-Capacitance Interconnects
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Solution Overview
Problem
As semiconductor devices are scaled down, their operation characteristics are degraded due to high integration, necessitating improved methods to maintain desired performance.
Innovation Solution
A semiconductor device design featuring lower conductive lines with via structures that include a via contact and a barrier pattern, which are electrically connected through a barrier and liner pattern, reducing parasitic capacitance and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via structures are formed to connect lower conductive lines, then electrical connection is improved, but parasitic capacitance increases
Solution Approach 1:
The via structure is segmented into multiple functional layers: a via contact portion for electrical connection, a via portion for insulation, and a barrier pattern for capacitance reduction. This segmentation allows each part to perform its specific function optimally while minimizing overall parasitic capacitance.
Solution Approach 2:
The via structure employs different materials and properties in different regions: the via contact uses conductive material for low resistance connection, the via portion uses insulating material to prevent capacitance, and the barrier pattern uses specific materials positioned strategically to reduce parasitic capacitance locally at critical interfaces.
2Reliability
If via structures are formed to connect lower conductive lines, then electrical connection is improved, but resistance increases
Solution Approach 1:
The via contact is formed to extend through the barrier pattern and directly contact the lower conductive lines before subsequent processing steps. This preliminary direct contact establishment ensures low resistance connection is achieved before any additional layers are added that might increase resistance.
Solution Approach 2:
The via structure uses composite material composition with conductive materials in the via contact portion for low resistance, and barrier materials in the barrier pattern for electrical isolation. This composite approach optimizes both conductivity and insulation requirements simultaneously.
Data Source
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AI summary
A semiconductor device includes lower conductive lines on a substrate, and spaced apart from each other in a first direction parallel to an upper surface of the substrate, and a via structure on the lower conductive lines, and electrically connected to the lower conductive lines. The via structure includes a via contact extending in the first direction and is electrically connected to the lower conductive lines, and a barrier pattern on a side surface of the via contact, and on a bottom surface of the via contact between the lower conductive lines. The via contact extends through the barrier pattern and contacts the lower conductive lines.