Via Structure Protection in Semiconductor Fabrication

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Solution Overview

Problem

Conductive structures and vias in semiconductor devices face deterioration during formation, affecting the integrity and performance of integrated circuits.

Innovation Solution

A method is introduced where a protective buffer layer is formed over the via structure before creating the conductive structure, with specific insulation layer thickness ratios and materials used to minimize deterioration, and a conductive fill with a lower thermal expansion coefficient is employed to prevent damage during thermal processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conductive structure is formed directly without protective layer, then manufacturing process is simpler, but the via structure deteriorates during conductive structure formation

Engineering Contradiction:
Improveintegrity of via structureVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A protective buffer layer is formed over the via structure before the conductive structure is formed. This preliminary protective action prevents deterioration of the via structure during subsequent conductive structure formation processes, resolving the contradiction between maintaining via integrity and keeping the process simple.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective buffer layer acts as an intermediary between the via structure and the conductive structure. It mediates the interaction by protecting the via structure from direct exposure to harmful factors during conductive structure formation, thereby maintaining via integrity while enabling the overall manufacturing process to proceed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If conventional materials are used in via structure, then material selection is easier, but thermal expansion causes damage during thermal processes

Engineering Contradiction:
Improvethermal stability of via structureVSAvoidmaterial selection ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the thermal parameter (thermal expansion coefficient) of the via structure by using a conductive fill material with a lower thermal expansion coefficient than conventional materials. This parameter change prevents thermal expansion damage during thermal processes while maintaining manufacturability through established deposition techniques.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The via structure employs a composite approach by combining a barrier layer with a conductive fill material that has specific thermal properties. This composite structure achieves both thermal stability during processing and ease of manufacture through standard semiconductor fabrication techniques.

Inventive Principle:
Principle #40Composite materials

3Manufacturing precision

If via structure is formed first without protection, then process sequence is simpler, but conductive structure formation causes deterioration

Engineering Contradiction:
Improveintegrity of both structuresVSAvoidfabrication efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The protective buffer layer is formed in advance over the via structure before conductive structure formation begins. This preliminary protective measure ensures both via structure and conductive structure maintain their integrity during fabrication, resolving the contradiction between manufacturing precision and fabrication efficiency.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach preserves the integrity of the via and conductive structures, ensuring high-performance integrated circuits with reduced parasitic capacitance and improved signal transfer characteristics.

Implementation Method 1

the method also includes the step of heating the via structure to form an initial protrusion portion of the via structure

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

a protective buffer layer is formed onto the via structure... preserving the integrity of the via structure during formation of the conductive structure

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 3

a conductive fill with a lower thermal expansion coefficient is employed to prevent damage during thermal processes

Methodology Applied
Scientific EffectThermal expansion coefficient mismatch: Thermal Expansion

Data Source

PatentUS8847399B2Semiconductor device and method of fabricating the same
Publication Date: 2014.09.30 SAMSUNG ELECTRONICS CO LTD
  • US8847399B2 patent drawing
  • US8847399B2 patent drawing
  • US8847399B2 patent drawing

AI summary

For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized.