Via and Capping Layer Material Matching for Low-Resistance Interconnects

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Solution Overview

Problem

The increasing resistance between wiring and vias in semiconductor devices due to down-scaling poses a challenge to the reliability of semiconductor chips, necessitating improved materials for the lower wiring capping layer and via to enhance electrical reliability.

Innovation Solution

The semiconductor device integrates the lower wiring capping layer and via with the same material, such as molybdenum, to reduce resistance and improve electrical reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If down-scaling is performed to achieve higher integration, then device integration increases, but resistance between wiring and vias increases

Engineering Contradiction:

Improvedevice integrationVSAvoidelectrical reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the material parameters of the lower wiring capping layer and via by using the same material (e.g., molybdenum) for both structures. This material parameter change reduces the resistance at the wiring-via interface while maintaining the benefits of down-scaling for higher device integration.

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If different materials are used for lower wiring capping layer and via, then manufacturing flexibility increases, but resistance between wiring and vias increases

Engineering Contradiction:

Improvemanufacturing flexibilityVSAvoidelectrical reliability

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies homogeneity by using the same material for both the lower wiring capping layer and the via. This material uniformity creates better electrical contact and reduces resistance at the interface, improving electrical reliability while still allowing manufacturing flexibility through the integrated formation process.

Inventive Principle:

Principle #33Homogeneity

3Reliability

If same material is used for lower wiring capping layer and via, then resistance between wiring and vias decreases, but manufacturing complexity increases

Engineering Contradiction:

Improveelectrical reliabilityVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the formation of the lower wiring capping layer and via into a single integrated process step. By combining these two structures and forming them simultaneously using the same material deposition process, the patent reduces manufacturing complexity while achieving the benefit of reduced resistance through material uniformity.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS20250316582A1Semiconductor device

Publication Date: 2025.10.09 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor device includes a substrate, a first interlayer insulating layer, a lower wiring layer, a lower wiring capping layer, an etching stop layer, a second interlayer insulating layer, a via trench that extends into the etching stop layer and the second interlayer insulating layer in a first direction, and a via in the via trench, where the via is in contact with the upper surface of the lower wiring capping layer, where an upper surface of the via in the first direction relative to the upper surface of the substrate is higher than an upper surface of the second interlayer insulating layer in the first direction relative to the upper surface of the substrate, and where the lower wiring capping layer includes a same material as the via.