Via Conductor Formation in Printed Wiring Boards
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Solution Overview
Problem
Existing printed wiring board manufacturing methods face challenges in achieving precise and efficient formation of via conductors, leading to potential warping, reduced processing accuracy, and increased manufacturing costs, particularly in forming high-precision circuits for high-frequency applications.
Innovation Solution
A method involving the formation of via-hole-formed elements with laser processing, electroless and electrolytic copper plating to create filled and conformal vias, and subsequent stacking of build-up layers, allowing for precise electrical connections and reduced grinding processes, thereby enhancing manufacturing efficiency and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional via conductor formation methods are used, then manufacturing process is simpler, but manufacturing precision and processing accuracy are reduced
Solution Approach 1:
The via conductor formation process is segmented into distinct stages: laser drilling of via holes, electroless copper plating for conductivity, electrolytic copper plating for filling, and grinding for flatness. Each stage independently contributes to the overall precision, allowing optimization of each step without compromising the others.
Solution Approach 2:
Electroless copper plating is performed as a preliminary action before electrolytic copper plating. This preliminary copper layer provides essential conductivity and adhesion to the via hole walls, enabling subsequent electrolytic filling to proceed effectively and achieve the required precision.
2Reliability
If conventional via conductor formation methods are used, then manufacturing costs are lower, but yield rates are reduced
Solution Approach 1:
The manufacturing process incorporates feedback mechanisms where each plating stage is controlled to achieve specific thickness and coverage requirements. The electroless plating provides a uniform base layer that feedback controls the subsequent electrolytic plating, ensuring consistent via conductor quality and high yield rates.
Solution Approach 2:
Traditional mechanical drilling and filling methods are replaced with laser drilling followed by electrochemical plating processes. This substitution enables more precise control over via conductor dimensions and properties, improving yield rates while maintaining cost-effectiveness through automated process control.
3Shape
If filled vias are provided in inner layers and conformal vias in outermost layers, then flatness of each layer is ensured, but via conductor structural integrity is compromised
Solution Approach 1:
The via conductor structure implements local quality by providing full electrolytic copper filling in the inner layer via conductor portion where mechanical strength is critical, while the outermost layer uses conformal plating where flatness is the primary requirement. This localized differentiation optimizes both strength and flatness.
Solution Approach 2:
The via conductor employs a composite structure combining electroless copper plating (for adhesion and uniform coverage), electrolytic copper plating (for strength and conductivity), and resin filling (for flatness and mechanical support). This composite approach achieves both structural integrity and layer flatness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in stable and precise formation of high-precision circuits with improved yield rates and reduced manufacturing costs, enabling reliable printed wiring boards for high-frequency applications by maintaining the structural integrity of via conductors and facilitating impedance matching.
Implementation Method 1
forming a via-hole-formed element by forming a first via hole from one surface of a core layer element and forming a second via hole from another surface of the core layer element
Implementation Method 2
performing a plating process on the via-hole-formed element and forming a first filled via in the first via hole and forming a conformal via in the second via hole
Implementation Method 3
forming a second filled via in the third via hole by performing a plating process on the via-hole-formed multilayer substrate element, the second filled via being electrically connected to the first filled via
Data Source
AI summary
A printed wiring board includes a multilayer substrate. The multilayer substrate includes a core layer and a build-up layer. The build-up layer is stacked on one surface of the core layer and constitutes a first surface of the multilayer substrate. The multilayer substrate is provided with a via conductor that penetrates through the core layer and the build-up layer in a thickness direction. The via conductor includes a filled via and a conformal via electrically connected to the filled via. At least part of the filled via overlaps the conformal via when viewed in the thickness direction and the filled via is positioned towards the first surface relative to the conformal via.