Via Contact Damascene Structures Single CMP Process
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Solution Overview
Problem
Current semiconductor manufacturing methods for forming via and damascene structures require multiple CMP steps to isolate conductive structures, which can damage low-k dielectric layers due to their porous and weak mechanical properties, leading to potential electrical property degradation and reliability issues.
Innovation Solution
A method involving the formation of a dielectric layer over a substrate, with non-conductive barrier layers on both the surface and within openings, followed by a single CMP process to remove the conductive and seed layers, eliminating the need for additional CMP steps and reducing damage to the underlying dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple CMP steps are used to isolate conductive structures, then via/damascene structures can be formed, but low-k dielectric layers are damaged due to their porous and weak mechanical properties
Solution Approach 1:
A non-conductive barrier layer is formed over the low-k dielectric layer before depositing the conductive layer. This preliminary protective layer prevents direct contact between CMP abrasives and the vulnerable dielectric material during subsequent polishing steps, thereby preventing damage while enabling effective via isolation.
Solution Approach 2:
The non-conductive barrier layer acts as an intermediary between the conductive structures and the low-k dielectric layer. It provides a protective interface that allows CMP processing to proceed without directly exposing the dielectric material to mechanical and chemical stresses from multiple polishing steps.
2Manufacturing precision
If multiple CMP steps are used to remove different layers (copper, seed layer, barrier layer), then complete isolation is achieved, but the manufacturing process becomes complex and time-consuming
Solution Approach 1:
The non-conductive barrier layer is designed to be removed together with the conductive and seed layers in a single CMP step. By combining the removal of multiple layers into one process step, the manufacturing complexity is reduced while maintaining complete isolation of adjacent via structures.
Solution Approach 2:
The non-conductive barrier layer serves multiple functions: it provides diffusion barrier properties during fabrication, enables complete layer removal in a single CMP step, and protects the dielectric layer during processing. This multi-functionality simplifies the overall manufacturing process.
3Manufacturing precision
If multiple CMP steps with different recipes and slurries are used, then complete removal of different material layers is achieved, but processing time and potential for damage increase
Solution Approach 1:
The non-conductive barrier layer is specifically designed with material properties that allow it to be removed in the same CMP step as the conductive and seed layers using a single recipe and slurry. This merging of removal steps significantly reduces processing time while ensuring complete elimination of all temporary structures.
Solution Approach 2:
The non-conductive barrier layer is formulated with specific material parameters (composition, hardness, chemical reactivity) that enable it to be processed together with metal layers in a single CMP step. By changing the barrier layer material parameters to match the removal characteristics of conductive materials, multiple separate CMP steps are consolidated into one.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process by avoiding the need for multiple CMP steps, thereby reducing the risk of damaging low-k dielectric layers and enhancing the reliability and electrical properties of the semiconductor structure.
Implementation Method 1
a chemical-mechanical polishing (CMP) process is used to remove the copper layer 150, the copper seed layer 140 and the Ta/TaN diffusion barrier layer 130 formed over the surface 121 of the dielectric layer 120
Data Source
AI summary
A method for forming a semiconductor structure includes forming a dielectric layer over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is then formed and a single polishing operation removes the seed layer and conductive layer.