Via Filling via Electroless and Electrolytic Plating
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Solution Overview
Problem
In printed wiring board manufacturing, the erratic deposition speed of plating metal during bottom-up plating can lead to incomplete conduction in via openings, resulting in faulty connections due to the difference in surface areas between the bottom and top portions of conductive circuits, causing uneven current flow and incomplete metal deposition.
Innovation Solution
The method involves forming an electroless plated film on the inner walls of via openings followed by electrolytic plating to fill the vias, ensuring metal deposition from both the bottom and side walls, thereby ensuring complete filling of via openings and reducing faulty connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bottom-up plating is used to form filled vias, then the conductive circuit at the bottom portions can be connected to electricity, but the deposition speed becomes erratic and incomplete conduction occurs when deposition is slow
Solution Approach 1:
The patent inverts the conventional bottom-up plating approach by first forming an electroless plated film on the inner walls of via openings, then performing electrolytic plating to fill the vias. This inversion ensures that metal deposition occurs from both the bottom and side walls simultaneously, preventing incomplete conduction and ensuring reliable connections even when deposition speed varies.
Solution Approach 2:
The electroless plated film serves as an intermediary layer that facilitates subsequent electrolytic plating. This intermediate step ensures that the via openings are properly prepared for metal deposition, providing a uniform base layer that promotes consistent deposition throughout the via filling process and prevents erratic deposition behavior.
2Productivity
If multiple filled vias are formed simultaneously with fast deposition speed, then productivity increases, but deposited metal contacts adjacent conductive circuits causing current to flow into them
Solution Approach 1:
The patent performs preliminary electroless plating to form a uniform film on the inner walls of via openings before conducting electrolytic plating. This preliminary action establishes proper deposition patterns that prevent metal from spreading to adjacent conductive circuits, even when fast deposition speeds are used during the electrolytic filling stage.
Solution Approach 2:
The electroless plated film creates local quality differences on the inner walls of via openings, providing specific nucleation sites that control where metal deposition occurs. This localized preparation ensures that during rapid electrolytic plating, metal deposits uniformly within the via openings rather than spreading to adjacent conductive circuits.
3Ease of operation
If the surface area of conductive circuit at top portions is larger than at bottom portions, then easier current flow path is created, but current flows mainly in top portions causing incomplete deposition in via openings with slow deposition speed
Solution Approach 1:
By inverting the plating sequence and using electroless plating first, the patent ensures that metal deposits on the inner walls before electrolytic plating begins. This inversion creates a deposition pattern that fills via openings uniformly from all surfaces, preventing current from preferentially flowing through top portions and ensuring complete conduction even in via openings with slower deposition speeds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for complete filling of via openings without faulty connections, enhancing the reliability and accuracy of conductive circuits by ensuring consistent metal deposition across all via openings, regardless of deposition speed variations.
Implementation Method 1
forming an electroless plated film on the inner wall of the via opening by performing electroless plating on the substrate
Implementation Method 2
forming a filled via by performing electrolytic plating on the substrate and filling metal in the via opening having the electroless plated film formed on the inner wall of the via opening
Data Source
AI summary
A method for manufacturing a printed wiring board, in which filled vias with a reduction in faulty connections are formed, and providing such a printed wiring board. After an electroless plated film is formed on an inner wall of a via opening, electrolytic plating is performed on insulative resin base material; the via opening is filled with plating metal and a filled via is formed. Therefore, during electrolytic plating, a plating metal is deposited from electroless plated film on the side wall of the via opening as well as from the bottom of the via opening. As a result, the via opening may be completely filled through electrolytic plating, forming a filled via with a reduction in faulty connections.