Via-to-Grid Overlay Accuracy in Sub-30nm Trench Patterning

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Solution Overview

Problem

At advanced nodes in semiconductor fabrication, aligning via masks between odd and even trenches becomes challenging when BEOL trench patterning goes below 30 nm pitch, leading to difficulties in via to grid overlay accuracy.

Innovation Solution

A self-alignment based process using multiple different materials and memorization layers is employed, where a multi-line layer with alternating materials is formed, allowing for independent etching and alignment of via patterns relative to odd and even trenches through dual memorization layers and etch masks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional via patterning is used at pitch below 30 nm, then manufacturing simplicity is maintained, but via to grid overlay accuracy deteriorates

Engineering Contradiction:
Improvevia to grid overlay accuracyVSAvoidpatterning process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The via patterning process is segmented into multiple independent steps: forming mandrels, depositing first spacers, depositing second spacers, and selective etching. Each step creates a portion of the final via pattern, allowing precise control over via placement relative to the grid while managing complexity through modular process stages

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Mandrels are formed in advance before the via openings are created. The mandrels serve as preliminary structures that define the future via locations. By establishing these reference structures first, the subsequent spacer deposition and etching steps can achieve precise overlay without requiring real-time alignment adjustments

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If single-material multi-line layer is used, then process simplicity is maintained, but selective etching capability deteriorates

Engineering Contradiction:
Improveetching process easeVSAvoidvia alignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

Different regions of the multi-line layer are assigned different materials with distinct etch selectivities. The first and second spacers use materials that are selectively etchable relative to each other and relative to the mandrels. This local differentiation enables independent patterning of via openings at different locations without affecting other structures

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The multi-line layer comprises composite material structures with at least three different materials: mandrel material, first spacer material, and second spacer material. Each material is chosen for its specific etch resistance properties, enabling selective removal of materials in sequence to create precise via patterns while maintaining structural integrity of remaining features

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly improves via alignment and overlay accuracy by decomposing via patterns into spacer side and mandrel side components, enhancing the precision of via to grid alignment and reducing edge placement errors.

Implementation Method 1

The multi-line layer includes a region having a pattern of alternating lines of two or more differing materials. At least two of the two or more differing materials differ chemically from each other by having different etch resistivities relative to each other.

Methodology Applied
Scientific EffectEtch resistivity difference:

Data Source

PatentUS10256140B2Method of reducing overlay error in via to grid patterning
Publication Date: 2019.04.09 TOKYO ELECTRON LTD
  • US10256140B2 patent drawing
  • US10256140B2 patent drawing
  • US10256140B2 patent drawing

AI summary

Techniques herein include a method of patterning a substrate that uses a self-alignment based process to align a via to odd and even trenches by using multiple different materials. Methods herein decompose or separate a via pattern into spacer side via and mandrel side via, and then sequentially access the spacer side and mandrel side respectively. With such a technique, overlay of via to grid is significantly improved. By using an additional memorization layer underneath a trench memorization layer and independently accessing the spacer side and mandrel side in the midst of a trench pattern, significant improvement in via alignment is achieved.