Via Hole Adhesive Layer for PCB Interlayer Delamination

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Solution Overview

Problem

Printed circuit boards face challenges with adhesive force degradation between insulating layers due to plating solutions penetrating interfacial surfaces, leading to cohesion issues and plating defects, especially when vias penetrate multiple layers.

Innovation Solution

Incorporating an adhesive layer on the side surfaces of via holes and extending it to the upper surface of the second insulating layer, preventing plating solution penetration and enhancing adhesion between layers, while ensuring signal transmission integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If vias collectively penetrate multiple insulating layers, then manufacturing efficiency is improved, but adhesive force between insulating layers deteriorates due to plating solution penetration

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidadhesive force
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A protective layer is introduced as an intermediary between the plating solution and the insulating layers. This protective layer prevents the plating solution from penetrating into the interface between insulating layers during via formation, thereby maintaining adhesive force while allowing vias to penetrate multiple layers collectively

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The via formation process is segmented into multiple steps: first forming protective layers on each insulating layer, then collectively forming vias through all layers. This segmentation allows the plating solution to be contained within the via holes rather than penetrating the insulating layer interfaces, resolving the contradiction between efficient collective via formation and maintaining adhesive force

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If plating solution penetrates interfacial surfaces, then via formation is simplified, but delamination and plating defects occur

Engineering Contradiction:
Improvevia formation simplicityVSAvoiddelamination and plating defects
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The potential harm of plating solution penetration is converted into a benefit by using the plating process to form the protective layer itself. The protective layer is formed through plating on the insulating layers, and then this same layer prevents harmful plating solution penetration in subsequent via formation steps

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

Protective layers are formed in advance on the insulating layers before via formation. This preliminary protective action prevents the plating solution from penetrating the insulating layer interfaces during subsequent via drilling and plating operations, avoiding delamination and plating defects

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively secures adhesive force between insulating layers, preventing delamination and plating defects, even with varying dielectric constants and materials, thus ensuring reliable high-frequency signal transmission.

Implementation Method 1

an adhesive layer disposed on at least a portion of a side surface of the via hole

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

a via penetrating at least a portion of each of the first and second insulating layers, and connecting the first circuit pattern to the second circuit pattern

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12127343B2Printed circuit board
Publication Date: 2024.10.22 SAMSUNG ELECTRO MECHANICS CO LTD
  • US12127343B2 patent drawing
  • US12127343B2 patent drawing
  • US12127343B2 patent drawing

AI summary

A printed circuit board includes a first insulating layer; a first circuit pattern embedded in the first insulating layer; a second insulating layer disposed on the first insulating layer; a via hole penetrating at least a portion of each of the first and second insulating layers; and an adhesive layer disposed on at least a portion of a side surface of the via hole.