Via Hole Capacitance Reduction in Circuit Boards

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Solution Overview

Problem

The excessive capacitance caused by the difference in width between via holes and the traces they connect leads to impedance discontinuity in signal transmissions on circuit boards, as the via holes are plated with more conductive material than the traces they interconnect.

Innovation Solution

The method involves forming via holes with conductive material and then removing a portion of this material from the sidewalls of the via holes to match the width of the conductive material with the traces, using side-drill-holes to reduce excess conductive material and thereby minimize capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If via holes are plated with electrically conductive material to interconnect traces on different layers, then electrical connection is achieved, but excessive capacitance is created resulting in impedance discontinuity

Engineering Contradiction:
Improveelectrical connectionVSAvoidimpedance discontinuity
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by making different portions of the via hole have different properties - the bottom portion retains conductive material for electrical connection while the sidewall portions have excess conductive material removed to reduce capacitance. This localized differentiation resolves the contradiction by maintaining connection reliability where needed while eliminating impedance discontinuity where excessive capacitance occurs.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent extracts the harmful excess conductive material from the via hole sidewalls while preserving the necessary conductive material at the bottom for electrical connection. By removing only the problematic portions that create excessive capacitance, the invention maintains reliable electrical connection while eliminating impedance discontinuity.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If via holes are plated with more electrically conductive material than the traces width, then adequate electrical connection is ensured, but via capacitance increases causing signal transmission issues

Engineering Contradiction:
Improveelectrical connectionVSAvoidsignal transmission quality
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The invention applies local quality by differentiating the treatment of different via hole regions - the bottom region maintains full conductive material coverage for reliable trace interconnection, while the sidewall regions have excess material removed to reduce capacitance. This localized approach ensures adequate electrical connection while minimizing signal transmission energy loss.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent extracts excess conductive material from the via hole sidewalls that causes increased capacitance and energy loss, while preserving the necessary conductive material at the bottom for reliable electrical connection. This selective removal reduces signal transmission energy loss while maintaining connection reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces via capacitance, enhancing impedance continuity and improving signal transmission quality by matching the width of the conductive material in the via holes with the traces, thus addressing the impedance discontinuity issue.

Implementation Method 1

using side-drill-holes to remove excess conductive material

Methodology Applied
Scientific EffectMechanical drilling:

Data Source

PatentUS8918991B2Process for providing electrical connections with reduced via capacitance on circuit boards
Publication Date: 2014.12.30 LENOVO GLOBAL TECHNOLOGIES SWITZERLAND INTERNATIONAL GMBH
  • US8918991B2 patent drawing
  • US8918991B2 patent drawing
  • US8918991B2 patent drawing

AI summary

The present invention relates to circuit boards and, more specifically, a process for providing electrical connections with reduced via capacitance on circuit boards. In one embodiment, the present invention provides a method for providing an electrical connection between traces disposed on different layers of a circuit board, the method comprising forming in the board a via hole that extends between the different layers and interconnects a pair of electrically conductive traces disposed on the different layers. An inner sidewall of the via hole includes electrically conductive material thereon. The method further comprises removing a first portion of the conductive material from the inner sidewall by removing a first portion of the inner sidewall. A remaining portion of the conductive material on a remaining portion of the inner sidewall interconnects the pair of traces and has a corresponding width that is substantially similar to a width of each trace.