Via Hole Embedding in PCB Manufacturing
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Solution Overview
Problem
Current printed circuit board manufacturing methods, such as semi-additive and full-additive processes, face issues with uneven film thickness and incomplete via hole embedding, leading to voids and reliability problems, especially for via holes with diameters between several micrometers to 100 micrometers.
Innovation Solution
A method involving the formation of a via fill using electroless plating liquid that contacts the exposed surface of the via hole's bottom part, allowing the plating metallic film to be laminated from the bottom to the opening of the via hole without applying catalyst to the entire via hole, ensuring complete embedding and uniform film thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If electroless plating is applied to the entire via hole including inner wall, then via hole embedding is achieved, but plating film overlaps and voids occur near the opening
Solution Approach 1:
The invention applies different treatments to different parts of the via hole: the bottom surface is activated to promote plating, while the inner wall is kept inactive to prevent overlapping plating. This local differentiation resolves the contradiction by enabling complete embedding at the bottom without creating voids at the opening.
Solution Approach 2:
The via hole treatment is segmented into two distinct zones: an activated bottom surface for embedding and a non-activated inner wall for uniform plating. This segmentation allows each zone to fulfill its specific function without interfering with the other, preventing both incomplete embedding and void formation.
2Productivity
If electro-plating is used to achieve high density wiring, then current distribution control is required, but film thickness becomes uneven and etching is needed
Solution Approach 1:
The invention replaces electro-plating (which requires current distribution control and subsequent etching) with electroless plating. This substitution eliminates the need for complex current control mechanisms and etching processes, achieving high density wiring with uniform film thickness directly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the complete embedding of via holes with diameters ranging from 1 to 100 micrometers, preventing voids and ensuring uniform film thickness, thereby improving electrical conductivity and reliability.
Implementation Method 1
a method involving the formation of a via fill using electroless plating liquid that contacts the exposed surface of the via hole's bottom part, allowing the plating metallic film to be laminated from the bottom to the opening of the via hole
Data Source
AI summary
The present invention is directed to a method for manufacturing a printed circuit board in which a plurality of conductive layers forming a wiring pattern are laminated in the state where they are put between insulating layers, and a printed circuit board formed thereby. The printed circuit board manufacturing method for the present invention includes a step of forming a via fill (17) to allow electroless plating liquid to be in contact with the surface of the wiring pattern exposed to a bottom part of a via hole (14) formed at a insulating layer to laminate plating metallic film from the bottom part to a opening part of the via hole (14), to form the via fill (17), and a step of forming a wiring pattern to form electroless plating metallic film (20) serving as the wiring pattern onto a substrate where the via fill (17) is formed.