Via Hole Etching in Display Panel Insulation Layers
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Solution Overview
Problem
In display panel fabrication, the formation of via holes by a single patterning process results in inconsistent sizes, leading to incomplete wrapping of pins by the second via hole, causing exposure of data lines and connection failures.
Innovation Solution
A method involving a second insulation layer with at least four layers of structures, where each layer's density decreases gradually, forming step-like inner walls in via holes to ensure proper pin insertion and prevent data line exposure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single patterning process is used to form both first via holes and second via holes, then processing steps are reduced and costs are saved, but the opening size of second via holes becomes larger than that of first via holes, causing incomplete pin wrapping and data line exposure
Solution Approach 1:
The patent divides the second insulation layer into multiple sub-layers (first sub-layer, second sub-layer, third sub-layer) with different etch rates. This segmentation allows the etching process to create via holes with controlled aperture sizes at different depths, ensuring that second via holes have appropriate opening sizes for complete pin wrapping while still using a single patterning process.
Solution Approach 2:
The patent applies local quality by assigning different etch rate characteristics to different sub-layers of the second insulation layer. The first sub-layer has a first etch rate, the second sub-layer has a second etch rate, and the third sub-layer has a third etch rate, creating localized variations in etching behavior that control the final via hole aperture size at specific regions.
2Productivity
If the same etching time is used for both first via holes and second via holes, then processing efficiency is maintained, but the opening size of second via holes is inevitably larger, leading to connection failures
Solution Approach 1:
The patent changes the physical parameters of the insulation layer structure by creating sub-layers with different etch rates. This allows the etching process to naturally create via holes with different aperture sizes at different depths during the same etching cycle, maintaining productivity while ensuring reliable pin wrapping for second via holes through controlled aperture reduction at shallower depths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces via hole apertures, ensuring complete pin wrapping and preventing display failures, while maintaining simplicity and productivity in the fabrication process.
Implementation Method 1
both of the first insulation layer 13 and the second insulation layer 14 are required to be etched when forming the first via hole 15
Data Source
Figure 1~3
Figure 4~6
AI summary
The present invention provides a display panel, a fabricating method thereof and a display device. The display panel comprises a pixel region and a fan-out region, first signal lines and second signal lines are provided to intersect each other in the pixel region, and extend into the fan-out region, respectively, a first insulation layer is provided between the first signal lines and the second signal lines, a second insulation layer is provided on the second signal lines, the second insulation layer comprises at least four layers of structures, and a density of each layer of structure of the second insulation layer decreases gradually along a direction away from the first insulation layer. A size of the via hole formed in the second insulation layer by etching is smaller than that of the via hole formed in the prior art.