Via-Hole Pixel Electrode Layout for High-Resolution Displays
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Solution Overview
Problem
Existing display technologies suffer from reduced display quality and resolution due to the large number of thin film transistors and wirings, which affect the accurate control of light emission.
Innovation Solution
The display apparatus is designed with a specific pixel arrangement and circuit configuration that includes a unique pixel layout and transistor structure, optimizing the placement and connectivity of pixels and transistors to enhance display quality and resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a large number of thin film transistors and wirings are used to control light emission, then the control accuracy of light emission is improved, but the display quality and resolution deteriorate
Solution Approach 1:
The patent merges multiple transistors into a single transistor structure. Specifically, it combines a switching transistor and a driving transistor into one integrated transistor, reducing the total number of transistors per pixel while maintaining the necessary control functions for light emission accuracy.
Solution Approach 2:
The integrated transistor structure performs multiple functions simultaneously. The single transistor structure executes both switching operations and driving functions that were previously separated, making the device more versatile and reducing complexity without sacrificing control accuracy.
2Device complexity
If the number of thin film transistors and wirings is reduced, then the display quality and resolution are improved, but the control accuracy of light emission deteriorates
Solution Approach 1:
By combining multiple transistor functions into a single integrated structure, the patent reduces the number of components while preserving the control accuracy through careful design of the integrated transistor's operational characteristics.
Solution Approach 2:
The patent adjusts key parameters of the integrated transistor including threshold voltage, channel width, and length to optimize performance. These parameter changes ensure that the single transistor can accurately control light emission despite performing multiple functions.
3Ease of operation
If more wirings are used to transmit electrical signals, then the control of thin film transistors is improved, but the wiring density increases and display performance decreases
Solution Approach 1:
The patent merges multiple wiring functions into fewer integrated wiring paths. By combining the gate wiring and source/drain wiring functions into an integrated transistor structure, the total wiring density is reduced while maintaining full control capability.
Solution Approach 2:
The patent utilizes vertical stacking and three-dimensional integration to reduce planar wiring density. By moving control functions to different vertical layers within the integrated transistor, the horizontal wiring requirements are minimized, improving display performance.
Data Source
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AI summary
A display includes a first thin film transistor (TFT) disposed in a first pixel region and including a first semiconductor layer and a first gate electrode, where the semiconductor layer includes first source and drain regions; a second TFT disposed in a second pixel region adjacent the first pixel region and including a second semiconductor layer and a second gate electrode, where the second semiconductor layer includes a second source and drain regions; a first pixel electrode disposed in the first pixel region and including a first region where a first light-emitting layer is disposed and a second region extending from the first region and disposed on a first via hole; and a second pixel electrode disposed in the second pixel region and including a third region where a second light-emitting layer is disposed and a fourth region extending from the third region and disposed on a second via hole.