Via Hole Plating Current Density Control

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Solution Overview

Problem

The existing methods for manufacturing multilayer wiring boards face challenges in suppressing plating voids during the electrolytic filling plating process, particularly for via holes with a diameter nearly equal to the insulating layer thickness, where the overhang of the metal foil at the hole opening causes the electrolytic filling plating layer to block the hole entrance, leading to void formation.

Innovation Solution

A method involving the temporary decrease and subsequent increase of electric current density during the electrolytic filling plating process, specifically when filling the lower space between the overhang and the inside wall of the via hole, ensures that the electrolytic filling plating layer is deposited uniformly, preventing voids by controlling the thickness and growth of the plating layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If electrolytic filling plating is performed continuously at constant current density, then the plating process is simple and fast, but plating voids occur when the opening is blocked by deposited metal

Engineering Contradiction:
Improveplating speedVSAvoidvoid-free plating
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies periodic action by dividing the electrolytic filling plating into multiple stages with alternating current density levels. The process uses high current density initially to rapidly deposit metal and fill the lower space, then switches to low current density to prevent opening blockage, and finally uses high current density again to complete the filling. This periodic variation in current density resolves the contradiction between fast plating and void-free filling.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the electrical parameter (current density) dynamically during the plating process. By adjusting current density between high and low levels at different stages, the process optimizes both filling speed and void prevention. The parameter change allows the system to adapt to different filling requirements at different depths, resolving the contradiction between productivity and reliability.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If high current density is used throughout the plating process, then plating is completed quickly, but the opening becomes blocked before the hole is filled

Engineering Contradiction:
Improveplating completion timeVSAvoidcomplete hole filling
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent uses periodic action with three distinct current density stages: high current density for rapid initial deposition, low current density to prevent opening blockage while allowing continued filling, and high current density again for final completion. This periodic pattern ensures both speed and completeness of filling without premature opening blockage.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies dynamics by making the current density variable rather than static. The current density is dynamically adjusted based on the filling progress and the risk of opening blockage. This dynamic control allows the process to maintain high productivity while ensuring complete hole filling, resolving the contradiction between speed and precision.

Inventive Principle:
Principle #15Dynamics

3Reliability

If low current density is used throughout the plating process, then plating voids are suppressed, but the plating process takes much longer

Engineering Contradiction:
Improvevoid suppressionVSAvoidplating process time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent resolves this contradiction by using periodic action with alternating current density levels. Low current density is applied only during the critical intermediate stage when opening blockage risk is highest, while high current density is used during safe stages for rapid filling. This selective application of low current density minimizes process time while maintaining void suppression where needed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the current density parameter dynamically rather than maintaining a constant low value. By adjusting current density based on process stage and void risk, the system achieves void suppression during critical phases while maintaining high productivity during safe phases, resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #35Parameter changes

4Manufacturing precision

If the lower space between overhang and inside wall is not filled first, then plating can proceed uniformly, but voids form in the lower space

Engineering Contradiction:
Improveuniform platingVSAvoidlower space filling
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by using high current density in the initial stage to preferentially fill the lower space between the overhang and inside wall before uniform plating can occur. This preliminary filling of the lower space prevents subsequent void formation, while the subsequent low current density stage ensures uniform plating without voids. The sequence resolves the contradiction between uniform plating and lower space filling.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses plating voids in the electrolytic filling plating layer, even for via holes with a diameter equal to the insulating layer thickness, by ensuring the plating layer fills the hole without blocking the opening, thereby improving the reliability and efficiency of the multilayer wiring board manufacturing process.

Implementation Method 1

filling in the hole for a via hole with an electrolytic plating layer formed by using an electrolytic filling plating solution

Methodology Applied
Scientific EffectElectrolysis: Electrolysis

Implementation Method 2

forming a base electroless plating layer within the hole and on the metal foil

Methodology Applied
Scientific EffectElectroless plating: Electroplating

Data Source

PatentUS10165691B2Method for manufacturing multilayer wiring substrate
Publication Date: 2018.12.25 LINCSTECH CO LTD
  • US10165691B2 patent drawing
  • US10165691B2 patent drawing
  • US10165691B2 patent drawing

AI summary

The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole, an overhang of a metal foil formed at an opening of the hole, and lower space formed between the overhang and an inside wall of the hole, by using a conformal method or a direct laser method; and (2) a step of filling in the hole by forming electrolytic filling plating layers within the hole and on the metal foil, wherein the filling-in of the hole by the formation of electrolytic filling plating layers in the step (2) is carried out by temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating, and increasing it again.