Via Impedance Matching Using Intermediate Conductors

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Solution Overview

Problem

High-speed electronic circuits face significant return loss issues due to impedance mismatches in vias of printed circuit boards, particularly at higher Nyquist frequencies, which affects signal integrity and performance in applications like 112G PAM4 standards.

Innovation Solution

Incorporating one or more intermediate conductors along the via, which can be non-functional pads, to modify the impedance profile and reduce return loss across specific frequency ranges of interest, such as 26.5625 GHz, by increasing capacitance and altering the impedance profile of the via.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional via structures are used, then device complexity is low, but return loss increases at high frequencies

Engineering Contradiction:
Improvereturn lossVSAvoidvia structure complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent introduces intermediate conductors as mediator elements between the via wall and the signal path. These intermediate conductors serve as impedance transformation elements that mediate the transition between different impedance levels, reducing return loss by providing a gradual impedance match rather than a abrupt transition.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the impedance parameters along the via structure by introducing intermediate conductors with specific impedance values. The via structure transitions from a uniform impedance to a graded impedance profile, where the impedance at different heights is optimized to minimize reflections at high frequencies.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If intermediate conductors are added to reduce return loss, then signal integrity improves, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidvia structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by introducing intermediate conductors only in specific regions where impedance matching is needed. The via structure maintains simple geometry in most areas while incorporating localized intermediate conductor elements that provide the necessary impedance transformation without requiring complete structural redesign.

Inventive Principle:
Principle #3Local quality

3Loss of energy

If via impedance is optimized for high frequencies, then return loss decreases at targeted frequencies, but return loss may increase at other frequencies

Engineering Contradiction:
Improvereturn loss at targeted frequenciesVSAvoidfrequency range performance
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent applies partial action by optimizing the via structure for specific frequency ranges rather than attempting to optimize for all frequencies. The intermediate conductors are designed to provide impedance matching for targeted frequency bands (e.g., 10-20 GHz), accepting that performance at other frequencies may be compromised.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces return loss at targeted frequencies, improving signal propagation and performance across a range of frequencies, even if it may increase return loss at other frequencies, thereby enhancing the overall performance of high-speed circuits.

Implementation Method 1

by increasing capacitance and altering the impedance profile of the via

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10952313B1Via impedance matching
Publication Date: 2021.03.16 ARISTA NETWORKS INC
  • US10952313B1 patent drawing
  • US10952313B1 patent drawing
  • US10952313B1 patent drawing

AI summary

An electronic circuit includes a first conductor configured horizontally on a first layer and a second conductor configured horizontally on a second layer. The second conductor is separated from the first conductor by a plurality of layers. A third conductor is configured between the first layer and the second layer. The third conductor electrically couples the first conductor and the second conductor. One or more intermediate conductors are electrically coupled to the third conductor, with the one or more intermediate conductors configured on one or more intermediate layers between the first layer and the second layer.