Via Insertion in IC Designs Using Threshold Comparisons
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Solution Overview
Problem
The complexity of traditional two-dimensional design rule checks (DRCs) in IC design processes using self-aligned double patterning (SADP) technology slows down design cycle time and is color dependent, making it difficult to ensure manufacturability without complex checks.
Innovation Solution
A method and apparatus that determine regions for inserting redundant or replacement vias by comparing adjacent regions to existing vias with threshold values, allowing for vias to be inserted without complex DRCs, ensuring manufacturability and reducing design cycle time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional two-dimensional design rule checks (DRCs) are used to ensure manufacturability, then manufacturability is improved, but design cycle time increases due to complex checks and color dependency
Solution Approach 1:
The patent extracts and eliminates the complex color-dependent DRC checking process from the via insertion methodology. Instead of performing comprehensive two-dimensional DRCs that require decomposition information and color analysis, the invention uses a simplified approach that only checks distance metrics against threshold values, thereby removing the time-consuming DRC verification step while maintaining manufacturability through alternative means
Solution Approach 2:
The patent changes the parameter basis for via insertion from color-dependent DRC metrics to distance-based threshold comparisons. By transforming the evaluation criteria into simple distance measurements (comparing distances to existing vias and routes against predetermined thresholds), the system achieves color-independent via insertion that is both manufacturable and computationally efficient
2Reliability
If complex two-dimensional design rule checks (DRCs) are performed, then manufacturability is ensured, but runtime of design tools increases
Solution Approach 1:
The patent removes the computationally intensive DRC verification step from the via insertion process. By extracting and eliminating the need for color-dependent DRC checks and decomposition information analysis, the system significantly reduces the runtime of design tools while maintaining manufacturability through simplified distance-based criteria
Solution Approach 2:
The patent replaces expensive, complex DRC checking with a cheaper, simpler threshold comparison approach. Instead of performing comprehensive DRC analysis that requires significant computational resources, the system uses straightforward distance measurements and threshold comparisons that are computationally inexpensive and execute rapidly
3Reliability
If traditional DRC processes are used, then manufacturability is verified, but the process becomes color dependent requiring decomposition information
Solution Approach 1:
The patent fundamentally changes the parameter basis from color-dependent DRC metrics to distance-based measurements. By evaluating only the distances from candidate via positions to existing vias and routes against predetermined thresholds, the system eliminates color dependency and decomposition information requirements while maintaining manufacturability verification
Solution Approach 2:
The patent segments the manufacturability verification into independent distance comparisons rather than requiring integrated DRC analysis. By breaking down the verification process into separate distance measurements to individual vias and routes, the system achieves color-independent evaluation that does not require decomposition information
Data Source
AI summary
A method and apparatus for insertion of a via improving a manufacturability of a resulting device while ensuring compliance with DRC rules are disclosed. Embodiments include: determining a layer of a substrate of an IC design having a first via and a plurality of routes, the plurality of routes extending horizontally on the substrate and placed on one of a plurality of equally spaced vertical positions; comparing a region of the layer extending vertically between a first set of the plurality of routes and extending horizontally between a second set of the plurality of the routes with one or more threshold values, the region being adjacent to the first via and being separated from the plurality of routes; and inserting a second via based on the comparison.


