Via Layer and Pixel Defining Layer Overlap for Display Reliability
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Solution Overview
Problem
Current display devices face challenges in improving reliability, particularly in the design and structure of pixels, which affect light output efficiency and production efficiency due to complex manufacturing processes.
Innovation Solution
The display device incorporates a unique pixel structure with a via layer and pixel defining layer configuration, where the via hole and pixel defining layer openings partially overlap in the non-emission area, allowing for a conductive pattern layer to contact the driving voltage line, enhancing electrical connections and reducing manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional pixel structure with separate via holes and pixel defining layer openings is used, then the manufacturing process is complex and requires separate electrical connections, but the emission area and light output efficiency are limited
Solution Approach 1:
The patent merges the via hole and pixel defining layer opening into a single integrated structure. The via layer includes a via hole that extends through the pixel defining layer, combining what were previously separate features into one unified configuration. This reduces structural complexity while maintaining reliable electrical connections between the driving voltage line and the emission layer, thereby improving reliability without requiring separate connection processes.
Solution Approach 2:
The via hole structure serves multiple functions simultaneously: it acts as both the electrical connection pathway and the pixel defining feature. By making the via hole extend through the pixel defining layer, the structure provides both the necessary electrical connectivity and the pixel boundary definition in a single element, reducing overall device complexity while maintaining reliability.
2Productivity
If the via hole and pixel defining layer opening are separate structures, then the manufacturing process requires multiple steps, but the emission area surface area is reduced
Solution Approach 1:
The via hole and pixel defining layer opening are merged into a single continuous structure that extends through the pixel defining layer. This integration allows the emission area to expand into the region previously occupied by separate structures, increasing the effective emission surface area while simplifying the manufacturing process to fewer steps.
Solution Approach 2:
The via hole is designed to extend in the vertical dimension through the pixel defining layer, creating a three-dimensional integrated structure. This vertical extension allows the emission area to utilize both the horizontal plane and the vertical space, effectively increasing the emission surface area while maintaining a compact footprint that improves production efficiency.
3Ease of manufacture
If separate via holes and pixel defining openings are used, then electrical connections require additional processes, but the light output efficiency is compromised
Solution Approach 1:
The via hole and pixel defining opening are combined into a single structure, eliminating the need for separate manufacturing processes for creating electrical connections. This simplification directly increases the emission area available for light generation, thereby improving light output efficiency while making the manufacturing process easier.
Solution Approach 2:
The via hole is formed to extend through the pixel defining layer in advance, during the initial structuring process. This preliminary action ensures that the electrical connection pathway is already in place before the emission layer is deposited, allowing the emission area to maximize its surface area without requiring additional connection steps, thus improving both ease of manufacture and light output efficiency.
Data Source
AI summary
A display device includes pixels each including an emission area and a non-emission area. Each pixel includes: a driving voltage line; a via layer disposed on the driving voltage line and including a first via hole exposing a first side of the driving voltage line, and a second via hole; a first electrode disposed on the via layer; a pixel defining layer disposed on the first electrode and the via layer and including a first opening formed in the emission area to expose a portion of the first electrode, and a second opening disposed in the non-emission area; an emission layer disposed in the first opening; and a second electrode disposed on the emission layer and the pixel defining layer. The second opening and the first via hole partially overlap each other. The via layer covers a second side of the driving voltage line.