Via-to-Line Overlay Measurement Using Backscattered Electron Imaging

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving precise overlay measurements for interconnect structures in integrated circuits, which are crucial for advanced lithography processes, due to the complexity and miniaturization demands of modern IC manufacturing.

Innovation Solution

The use of backscattered electron detectors for overlay measurements, which provide clear contrast and accurate alignment by detecting differences in atomic number and topography, allowing for precise alignment of interconnect structures through a see-through measurement process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional overlay measurement methods are used for interconnect structures, then the measurement process can be completed, but the measurement precision and reliability are insufficient due to poor contrast and signal quality

Engineering Contradiction:
Improveoverlay measurement precisionVSAvoiddifficulty of detecting overlay alignment
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The patent replaces conventional optical detection methods with electron beam-based detection. Specifically, it uses backscattered electron detectors or secondary electron detectors in a scanning electron microscope to detect overlay alignment, substituting optical systems with electron microscopy systems that provide superior contrast and signal quality for interconnect structures

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent utilizes differences in electron signal intensity (analogous to color changes) between different materials and structures. Backscattered electrons provide contrast based on atomic number differences, while secondary electrons provide topographic contrast, enabling clear differentiation of interconnect features for accurate overlay measurement

Inventive Principle:
Principle #32Color changes

2Productivity

If advanced lithography processes are implemented for miniaturization, then IC production efficiency increases, but overlay measurement reliability deteriorates due to smaller feature sizes and complex structures

Engineering Contradiction:
ImproveIC production efficiencyVSAvoidoverlay measurement reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent replaces conventional optical overlay measurement systems with electron beam-based measurement systems. The electron microscope provides higher resolution and better contrast for miniaturized interconnect structures, maintaining measurement reliability as feature sizes decrease with advanced lithography generations

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the detection parameter from optical signals to electron signals (backscattered or secondary electrons). This parameter change enables reliable detection of overlay alignment in miniaturized structures where optical methods fail to provide sufficient contrast and signal quality

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances the reliability and accuracy of overlay measurements, ensuring precise alignment of interconnect structures, thereby supporting advanced lithography processes and improving manufacturing efficiency.

Implementation Method 1

The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line

Methodology Applied
Scientific EffectBackscattered electron detection: Scattering

Data Source

PatentUS12543549B2Method of overlay measurement
Publication Date: 2026.02.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12543549B2 patent drawing
  • US12543549B2 patent drawing
  • US12543549B2 patent drawing

AI summary

A method includes depositing an inter-metal dielectric (IMD) layer over a conductive line. A via opening is formed in the IMD layer and directly over the conductive line. A width of the conductive line is greater than a width of the via opening. An overlay measurement is performed. The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line and determining an overlay between the via opening and the conductive line according to the backscattered electron image.