Via Obstruction Segmentation for Design Rule Checking

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Design rule checkers face difficulties in verifying the spacing constraints among nearest neighbor via shapes in integrated circuit designs when these shapes are abstracted into via obstructions, as the locations and sizes of the actual via shapes within the obstructions are unknown, making it challenging to comply with design rules.

Innovation Solution

The method involves examining the size of via obstructions relative to minimum size and spacing constraints, initializing neighboring via counters, and representing via obstructions as smaller shapes during design rule checking, using a scan line algorithm to ensure compliance with design rules on the number and spacing of neighboring via shapes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If via shapes are abstracted into via obstructions to simplify design representation, then design complexity is reduced, but design rule checking accuracy deteriorates because the locations and sizes of actual via shapes within obstructions are unknown

Engineering Contradiction:
Improvedesign representation complexityVSAvoiddesign rule checking accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments via obstructions into multiple smaller representative via shapes based on the obstruction's size relative to minimum spacing constraints. Large obstructions are divided into multiple smaller shapes that can be individually evaluated against design rules, while small obstructions are treated as single via shapes. This segmentation allows the design rule checker to accurately verify spacing constraints while maintaining the simplified obstruction representation.

Inventive Principle:
Principle #1Segmentation

2Productivity

If via obstructions are represented as single shapes, then processing speed is improved, but the ability to detect design rule violations deteriorates

Engineering Contradiction:
Improvedesign rule checking speedVSAvoiddesign rule violation detection accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a dynamic representation strategy where via obstructions are adaptively represented as either single shapes or multiple shapes based on their dimensions relative to minimum spacing constraints. This dynamic approach allows the design rule checker to optimize between processing speed and detection accuracy for each obstruction, maintaining efficiency while ensuring reliable violation detection.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the representation parameters of via obstructions based on size criteria. When an obstruction's dimensions exceed minimum spacing constraints, it is represented as multiple smaller shapes with specific size parameters; otherwise, it remains a single shape. This parameter-based transformation enables accurate design rule checking while preserving processing efficiency.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If the center of via obstruction is used as the via shape center, then processing is simplified, but spacing verification accuracy deteriorates because the obstruction center may not be the true via shape center

Engineering Contradiction:
Improveprocessing simplicityVSAvoidspacing verification accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

By segmenting via obstructions into multiple smaller representative shapes, the patent eliminates the need to rely on the obstruction center as the via shape center. Each segmented shape has its own center that can be accurately determined, allowing precise spacing verification without the simplification errors associated with using the overall obstruction center.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7725850B2Methods for design rule checking with abstracted via obstructions
Publication Date: 2010.05.25 X CORP
  • US7725850B2 patent drawing
  • US7725850B2 patent drawing
  • US7725850B2 patent drawing

AI summary

Methods of treating via obstructions during design rule checking. The method comprises examining the size of the via obstruction with respect to a minimum size and a minimum spacing constraint of a design rule. Based upon the comparison, a neighboring via count for a number of via shapes neighboring the via obstruction may be initialized to equal a positive integer. Based upon the comparison, the via obstruction may be represented with a plurality of smaller via shapes during design rule checking.