Via Opening Rework Using Underfill to Prevent Profile Damage
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Solution Overview
Problem
The scaling down of semiconductor devices poses challenges in achieving improved quality, yield, performance, and reliability due to issues such as enlargement and profile damage of via openings, which are not effectively addressed by existing methods.
Innovation Solution
A method involving the use of an underfill or bottom filling layer to alleviate enlargement and profile damage of via openings, including forming a substrate, dielectric layer, and via openings, followed by the application of multiple mask layers and etching processes to form trenches and vias, with specific steps for reworking failed hard mask layers to improve semiconductor device fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods are used for scaling down semiconductor devices, then manufacturing complexity increases, but via opening enlargement and profile damage occur reducing yield and reliability
Solution Approach 1:
A bottom filling layer is introduced as an intermediary material between the via opening and the hard mask layer. This bottom filling layer prevents direct contact between the etching process and the via opening sidewalls, thereby preventing profile damage and enlargement while maintaining manufacturing precision and device reliability.
Solution Approach 2:
The bottom filling layer is formed in advance before the hard mask layer and etching processes. This preliminary action protects the via opening profile from subsequent processing steps, ensuring that the via opening maintains its intended dimensions and shape throughout the fabrication process.
2Ease of manufacture
If multiple mask layers and etching processes are used to form trenches and vias, then manufacturing complexity increases, but via opening profile damage occurs reducing yield
Solution Approach 1:
The bottom filling layer serves as a protective intermediary that remains throughout the multiple mask layer formation and etching processes. It shields the via opening sidewalls from damage during these complex manufacturing steps, maintaining profile integrity without significantly increasing process complexity.
Solution Approach 2:
The bottom filling layer provides beforehand cushioning or protection to the via opening profile before the damaging etching processes occur. This protective layer absorbs or prevents the harmful effects of the etching process on the via opening sidewalls.
Data Source
AI summary
The present application discloses a method for fabricating a semiconductor device including providing a substrate; forming a dielectric layer on the substrate; forming a via opening in the dielectric layer using a first mask layer as a mask; forming a failed hard mask layer to fill the via opening; forming a second mask layer on the failed hard mask layer; removing the second mask layer and the failed hard mask layer; forming an underfill layer to fill the via opening; forming a top hard mask layer on the underfill layer; forming a third mask layer on the top hard mask layer; patterning the top hard mask layer using the third mask layer as a mask; forming a trench opening in the dielectric layer using the top hard mask layer as a mask; and forming a via in the via opening and forming a trench in the trench opening.