Via Structure Peripheral Height for Dielectric Erosion Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor devices with varying pattern density regions face challenges in via structure fabrication, leading to reliability issues due to dielectric material erosion and defects like delamination or cracking, which affect the uniformity and performance of passive devices.

Innovation Solution

The implementation of via structures with a peripheral portion having a greater height than the central portion, formed using a method that includes depositing a dielectric layer over a substrate, creating openings, and using a recessed mask layer to minimize dielectric material erosion and maintain uniformity across regions of varying pattern density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional via structures with uniform height are used in regions of varying pattern density, then fabrication is simpler, but dielectric material erosion and defects like delamination or cracking occur, reducing reliability

Engineering Contradiction:
Improvevia structure reliabilityVSAvoidvia structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The via structure employs different heights for its peripheral portion and central portion, creating local quality variations. The peripheral portion has a greater height than the central portion, allowing the structure to adapt to varying pattern density regions and prevent dielectric material erosion and defects while maintaining overall reliability.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If conventional uniform via structures are fabricated across varying pattern density regions, then manufacturing process is simpler, but dielectric material erosion occurs leading to delamination or cracking

Engineering Contradiction:
Improvedielectric layer uniformityVSAvoidvia structure fabrication ease
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The via structure employs different heights for its peripheral portion and central portion, creating local quality variations. The peripheral portion has a greater height than the central portion, allowing the structure to adapt to varying pattern density regions and prevent dielectric material erosion and defects while maintaining overall reliability.

Inventive Principle:
Principle #3Local quality

3Reliability

If via structures with greater peripheral height are implemented, then dielectric material erosion is reduced and reliability is enhanced, but manufacturing process becomes more complex

Engineering Contradiction:
Improvepassive device reliabilityVSAvoidvia structure profile complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The via structure employs different heights for its peripheral portion and central portion, creating local quality variations. The peripheral portion has a greater height than the central portion, allowing the structure to adapt to varying pattern density regions and prevent dielectric material erosion and defects while maintaining overall reliability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11610837B2Via structures of passive semiconductor devices
Publication Date: 2023.03.21 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US11610837B2 patent drawing
  • US11610837B2 patent drawing
  • US11610837B2 patent drawing

AI summary

A semiconductor device is provided, which includes a dielectric layer and a via structure. The dielectric layer is arranged over a substrate. The via structure is arranged in the dielectric layer, the via structure having a peripheral portion and a central portion. The peripheral portion of the via structure has a height that is greater than that of the central portion.