Via Structure Planar Portion Conductive Fill for Stacked Semiconductor
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Solution Overview
Problem
In semiconductor devices, achieving a high-quality connection between conductive lines and vias with low resistance and high current capacity is challenging due to the need for precise formation of conductive structures on via surfaces, particularly in stacked semiconductor devices where through silicon vias (TSVs) are used to connect multiple integrated circuit chips.
Innovation Solution
A conductive structure is formed only on the planar portion of a via structure, avoiding the protrusion portion, with a buffer layer and dielectric layer surrounding the conductive structure to ensure low resistance and high current capacity connections, and the via structure is designed with a center fill having a lower thermal expansion coefficient than the conductive fill to minimize protrusion height.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a conductive structure is formed onto the entire surface of a via structure, then the connection area is maximized, but the manufacturing precision and connection quality deteriorate due to the protrusion portion causing non-planar contact
Solution Approach 1:
The via surface is segmented into a planar portion and a protrusion portion. The conductive structure is formed only on the planar portion, while the protrusion portion is excluded from contact. This segmentation allows the conductive structure to achieve high manufacturing precision on a flat surface while maintaining adequate contact area through proper planar region design.
Solution Approach 2:
Different regions of the via surface are assigned different functions: the planar portion serves as the contact region for the conductive structure to ensure low resistance and high current capacity, while the protrusion portion is excluded to prevent manufacturing defects. This local quality differentiation resolves the contradiction by optimizing each region for its specific purpose.
2Area of stationary object
If the protrusion portion is minimized through material selection, then the planar contact area is maximized, but the structural integrity may be compromised
Solution Approach 1:
A composite structure is employed consisting of a conductive fill (e.g., copper) within the via and a center fill (e.g., tungsten or other material with lower thermal expansion coefficient) in the central region. This composite material approach allows the protrusion portion to be minimized through differential thermal expansion characteristics, maximizing the planar contact area while the conductive fill maintains structural integrity and electrical conductivity.
3Reliability
If thermal expansion coefficients are optimized to minimize protrusion, then contact resistance is reduced, but the device complexity increases
Solution Approach 1:
The thermal expansion coefficient parameter is optimized by selecting a center fill material with a lower thermal expansion coefficient than the conductive fill. This parameter change causes the center fill to expand less during thermal processing, minimizing the protrusion height and maximizing the planar contact area. The result is reduced contact resistance and improved reliability, while the complexity increase is limited to the additional material selection and process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient and reliable connections between conductive lines and vias, reducing contact resistance and enhancing current flow while maintaining structural integrity, particularly in stacked semiconductor devices.
Implementation Method 1
The center fill has a thermal expansion coefficient that is lower than that of the conductive fill such that the protrusion portion is formed as a ring with minimized height of the protrusion portion
Data Source
AI summary
A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.