Via Plug Etch-Delay Structures for Backside Illuminated Image Sensors
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Solution Overview
Problem
Existing backside illuminated image sensors face challenges in manufacturing via plugs with different vertical lengths, requiring multiple photolithography and etching processes, which complicates the integration of upper and lower circuit interconnections.
Innovation Solution
The implementation of via plugs with distinct vertical lengths, utilizing etch-delay structures and buried non-conductive layers to control the etching process, allowing for efficient formation of via plugs that contact both upper and lower plug pads, thereby simplifying the manufacturing process and improving interconnection reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If two photolithography processes and two etching processes are performed to form via plugs of different lengths, then the via plugs can be formed with distinct vertical lengths, but the manufacturing process complexity increases
Solution Approach 1:
The via plug formation process is segmented into different etching stages using etch-delay structures. The etch-delay structure divides the single etching process into multiple phases, allowing the first via plug to be formed to a first depth and the second via plug to be formed to a greater second depth, eliminating the need for multiple separate etching processes.
Solution Approach 2:
The etch-delay structure is formed in advance within the substrate before the via plugs are created. This preliminary structure controls the etching process by providing differential etch resistance, guiding the etch front to stop at different depths for different via plug locations, thereby pre-determining the via plug length differentiation.
2Reliability
If multiple photolithography and etching processes are used to form via plugs of different lengths, then via plugs can contact both upper and lower plug pads, but the manufacturing time and productivity are reduced
Solution Approach 1:
The formation of via plugs with different lengths is merged into a single etching process by utilizing the etch-delay structure. Instead of performing separate etching processes for different via plug depths, the differential etch resistance of the etch-delay structure enables simultaneous formation of via plugs with distinct vertical lengths in one continuous etching operation.
Solution Approach 2:
The etch-delay structure serves multiple functions: it acts as an etch stop layer, a depth control mechanism, and a pattern definition element. This multi-functional structure enables the single etching process to achieve what would otherwise require multiple specialized processes, thereby improving manufacturing efficiency while maintaining interconnection reliability.
3Adaptability or versatility
If via plugs of different lengths are formed through multiple processes, then upper and lower circuit interconnections can be integrated, but the manufacturing cost increases
Solution Approach 1:
The etch-delay structure utilizes parameter changes in material properties, specifically the etch resistance parameter. By incorporating materials with different etch resistance characteristics into the substrate, the structure enables differential etching rates that automatically control via plug depths, replacing complex multi-process manufacturing with a simpler single-process approach.
Data Source
AI summary
A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.