Via Plug Structure for Low-Capacitance Source/Drain Contacts

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Solution Overview

Problem

As semiconductor devices scale down, there is a need to reduce capacitance and ensure electrical stability between contacts, which existing multi-gate transistors struggle to achieve effectively, particularly in maintaining performance and reliability.

Innovation Solution

A semiconductor device design featuring a gate structure with a gate electrode, source/drain patterns, interlayer insulating layers, via plugs, and an etch stop structure layer, including multiple stacked etch stop layers, to improve electrical stability and reduce capacitance, while maintaining performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are scaled down to increase density, then device density is improved, but electrical stability and capacitance control deteriorate

Engineering Contradiction:
Improvedevice densityVSAvoidelectrical stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The via plug contact structure is segmented into multiple portions (first portion, second portion, third portion) with different lateral dimensions. The first portion has a larger lateral dimension for stable contact with the source/drain pattern, the second portion has a reduced lateral dimension for reduced capacitance, and the third portion provides transition. This segmentation allows simultaneous optimization of electrical stability and capacitance control in scaled-down devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the via plug contact are assigned different local geometries and functions. The lower portion (first via plug contact portion) maintains larger dimensions for reliable electrical contact, while the upper portion (second via plug contact portion) reduces dimensions to minimize capacitance. This local quality variation resolves the contradiction between needing stable contact and reducing capacitance in scaled devices.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If via plug contact dimensions are reduced to reduce capacitance, then capacitance is improved, but electrical stability and contact reliability deteriorate

Engineering Contradiction:
ImprovecapacitanceVSAvoidcontact stability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The via plug contact is divided into segmented portions with progressively changing lateral dimensions. The first portion maintains larger size for stability, the second portion reduces size for lower capacitance, creating a gradient structure that balances both requirements rather than using a uniform small dimension throughout.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The via plug contact transitions from a two-dimensional cross-section view to a three-dimensional structure with varying lateral dimensions at different heights. By utilizing the vertical dimension to create a tapered or stepped geometry, the design achieves reduced capacitance (through smaller upper dimensions) while maintaining contact stability (through larger lower dimensions).

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12040275B2Semiconductor device including via plug connected to source/drain pattern
Publication Date: 2024.07.16 SAMSUNG ELECTRONICS CO LTD
  • US12040275B2 patent drawing
  • US12040275B2 patent drawing
  • US12040275B2 patent drawing

AI summary

A semiconductor device includes a substrate, a gate structure, a source/drain pattern, first and second interlayer insulating layers, a first via plug connected to the source/drain pattern, and an etch stop structure layer, which may include a plurality of etch stop layers sequentially stacked. The etch stop structure layer may have a structure in relation to other components that improves aspects of the semiconductor device.