3D Semiconductor Via Plug Support Pattern for CMP Alignment
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Solution Overview
Problem
The increasing integration of semiconductor devices leads to challenges in vertically aligning fine contact plugs with large aspect ratios, and the CMP process causes dishing issues affecting the flatness and alignment between contact plugs.
Innovation Solution
Incorporating support patterns that contact the side surface of lower via plugs, these patterns are made of the same material as the lower conductive layer and have the same vertical thickness, helping to alleviate dishing and improve alignment margins by acting as a CMP stopper or resistor, ensuring top surfaces of the via plugs and support patterns are coplanar.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If CMP process is performed to planarize the surface, then flatness is improved, but dishing occurs affecting alignment between contact plugs
Solution Approach 1:
The support pattern is formed in advance before the CMP process to prevent dishing from occurring in the first place. By having the support pattern already in place, it provides structural reinforcement that maintains planarity during subsequent processing steps, eliminating the need to correct dishing after it occurs.
Solution Approach 2:
The support pattern acts as an intermediary structure between the substrate and the contact plugs. It provides a stable reference plane that mediates the CMP process, ensuring that the contact plugs can be accurately aligned without being affected by dishing deformations.
2Productivity
If pitch and space between interconnections and contact plugs are reduced for higher integration, then integration degree is improved, but vertical alignment of fine contact plugs with large aspect ratio becomes difficult
Solution Approach 1:
The support pattern extends in the horizontal dimension to provide a broader base of support for the contact plugs. This lateral extension creates a larger alignment margin, making it easier to achieve vertical alignment even when the contact plugs have large aspect ratios and are closely spaced.
Solution Approach 2:
The support pattern serves as an intermediary structure that facilitates the alignment process. It provides visual and physical reference points that guide the positioning of contact plugs, making the alignment process more reliable despite reduced pitch and space constraints.
Data Source
AI summary
The semiconductor device includes a substrate having a cell area and a via area; a transistor and a logic interconnection disposed over the substrate; a lower insulating layer covering the transistor and the logic interconnection; a lower conductive layer on the lower insulating layer in the cell area; a support pattern disposed on the lower insulating layer in the via area; a lower via plug having a side surface in contact with the support pattern and a bottom surface in contact with the logic interconnection; a word line stack disposed on the lower conductive layer in the cell area; an dielectric layer stack disposed on the support pattern in the via area; a vertical channel pillar penetrating the word line stack to be connected to the lower conductive layer; and an upper via plug penetrating the dielectric layer stack to be vertically aligned with the lower via plug.