Through-Silicon Via Protective Layer Against Delamination

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Solution Overview

Problem

The formation of through silicon via structures in semiconductor devices often results in delamination defects due to damage during cavity etching, leading to reduced manufacturing yield and reliability, and potential electrical shorting due to material diffusion.

Innovation Solution

A multi-layer structure with a metal ring and dielectric sidewall structure includes a protective layer between the interconnect structure and the dielectric sidewall, which prevents delamination and material diffusion during conductive material deposition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If cavity etching is performed to form through silicon via structures, then interconnect structures can be formed, but delamination defects occur due to damage during etching

Engineering Contradiction:
Improveinterconnect structure formationVSAvoiddelamination defects
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A protective layer is introduced as an intermediary between the dielectric sidewall structure and the interconnect structure. This protective layer prevents direct damage to the dielectric sidewall during cavity etching and conductive material deposition, thereby eliminating delamination defects while still allowing interconnect structure formation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protective layer is formed in advance before the cavity etching and conductive material deposition processes. This preliminary action prepares the structure to withstand subsequent manufacturing steps without causing delamination, resolving the contradiction between ease of manufacture and reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If conductive material is deposited to form interconnect structures, then electrical connectivity is achieved, but material diffusion causes electrical shorting

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmaterial diffusion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The protective layer serves as a barrier that prevents conductive material from diffusing into the dielectric sidewall structure during the deposition process. This intermediary layer maintains electrical connectivity through the interconnect structure while blocking harmful material diffusion that would cause electrical shorting.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful effect of material diffusion is extracted and isolated by the protective layer, which confines the conductive material to the intended interconnect structure region. This prevents the material from spreading into adjacent areas where it would cause electrical shorting.

Inventive Principle:
Principle #2Taking out (Extraction)

3Strength

If dielectric sidewall structure is formed during cavity etching, then structural support is provided, but damage to sidewall causes delamination

Engineering Contradiction:
Improvestructural supportVSAvoidsidewall damage
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The protective layer is positioned between the dielectric sidewall structure and the interconnect structure, acting as a mediator that absorbs mechanical stress and prevents direct damage to the sidewall during cavity etching. This preserves the structural support function of the dielectric sidewall while preventing manufacturing defects.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protective layer provides beforehand cushioning to the dielectric sidewall structure during the cavity etching process. This protective measure prevents damage before it can occur, maintaining both the structural support integrity and manufacturing precision of the sidewall.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20240429129A1Semiconductor device and method of manufacturing the same
Publication Date: 2024.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240429129A1 patent drawing
  • US20240429129A1 patent drawing
  • US20240429129A1 patent drawing

AI summary

Some implementations herein provide a semiconductor device and methods for forming the semiconductor device. A multi-layer structure of the semiconductor device includes a metal ring structure and a dielectric sidewall structure along interior sidewalls of the metal ring structure. An interconnect structure (e.g., a through silicon via interconnect structure) is along a central interior axis of the metal ring structure. A protective layer is between the interconnect structure and the dielectric sidewall structure. During a deposition operation that fills a cavity with a conductive material to form the interconnect structure, the protective layer may protect the dielectric sidewall structure from damage to improve a quality and/or a reliability of the semiconductor device.