Through-Substrate Via Fabrication with Ring Dielectric Isolation
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Solution Overview
Problem
Existing methods for fabricating electrical through-hole interconnects face challenges such as non-uniform dielectric coverage, limited scalability, and difficulties in patterning high aspect ratio vias, which hinder the development of efficient 3D interconnects for microelectronics systems.
Innovation Solution
A method involving the creation of ring structures in a substrate, filling them with dielectric material, removing the inner pillar structure to form a vacancy, and filling this vacancy with conductive material to establish electrical interconnects, allowing for uniform dielectric thickness and efficient conductive path formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dielectric material is deposited conformally on substrate holes to form isolation rings, then uniform dielectric coverage is achieved, but the method becomes difficult to scale and patterning high aspect ratio vias becomes problematic
Solution Approach 1:
The substrate surface is planarized before depositing the dielectric material, creating a flat foundation that enables uniform conformal deposition. This preliminary planarization step ensures that subsequent dielectric layers deposit evenly across the surface, solving the uniformity issue while maintaining scalability
Solution Approach 2:
The invention transitions from simple conformal deposition to a multi-step process involving planarization in the vertical dimension, then conformal deposition, followed by selective removal. This dimensional approach allows uniform dielectric coverage to be achieved without compromising scalability or via patterning capability
2Reliability
If isolation material is deposited by CVD to fill ring structures, then complete filling is achieved, but gaps or seams form at the centre of the filling ring
Solution Approach 1:
The inner pillar structure is removed before filling the ring structure with dielectric material. This creates a continuous open space that allows uniform material deposition without the gap formation issue that occurs when filling around central pillars
Solution Approach 2:
The central inner pillar structure is extracted/removed from the ring structure, eliminating the obstacle that causes gap formation during CVD filling. This allows the dielectric material to deposit uniformly across the entire ring structure without creating seams at the center
3Manufacturing precision
If the substrate surface is planarized after filling substrate holes with dielectric material, then uniform deposition is enabled, but the process complexity increases
Solution Approach 1:
The fabrication process is segmented into distinct stages: substrate hole formation, dielectric filling, surface planarization, conformal dielectric deposition, and selective removal. This segmentation allows each step to be optimized independently, achieving surface planarity without overwhelming process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of electrical interconnects with uniform dielectric thickness, improved scalability, and efficient conductive path formation, facilitating 3D stacks and packaging applications in microelectronics.
Implementation Method 1
Filling the at least one ring structure with a first dielectric material with spin-on or spray-on or CVD in the ring structure and on the first main surface
Implementation Method 2
Filling the at least one ring structure with a first dielectric material with spin-on or spray-on or CVD in the ring structure and on the first main surface
Implementation Method 3
Filling the at least one ring structure with a first dielectric material with spin-on or spray-on or CVD in the ring structure and on the first main surface
Data Source
Figure 1(a)~1(h)
Figure 2
Figure 3(a)~3(b)
AI summary
A method for the fabrication of electrical interconnects in a substrate is disclosed. The method comprises providing a substrate having a first main surface. In one aspect, the method further comprises producing a ring structure in the substrate from the first main surface, the ring structure surrounding an inner pillar structure, and having a bottom surface. The method further comprises filling the ring structure with a dielectric material. The method further comprises providing a conductive inner pillar structure, hereby forming an interconnect structure, the interconnect structure forming an electrical path from the bottom surface up until the first main surface. This conductive inner pillar structure can for example be provided by removing the inner pillar structure leaving a pillar vacancy and at least partially filling the vacancy with a conductive material. The dielectric material is applied in liquid phase.