Via Shielding Parasitic Mutual Capacitance Embedded Passives
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Solution Overview
Problem
Existing techniques to reduce parasitic mutual capacitances in RF devices, such as increasing the distance between capacitors, are ineffective and result in increased package form factor, degrading electrical performance.
Innovation Solution
The implementation of capacitors with via or ribbon connections through a dielectric layer to shield mutual capacitance between adjacent capacitors, reducing unwanted coupling and enhancing electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the distance between capacitors is increased, then parasitic mutual capacitances are reduced, but package form factor increases
Solution Approach 1:
A ground electrode is introduced as an intermediary element between the first and second capacitors. This ground electrode acts as a shield that intercepts and redirects electric field lines, preventing direct coupling between the capacitors. The ground electrode is connected to ground potential, creating an equipotential barrier that reduces parasitic mutual capacitance without requiring increased spacing between capacitors.
Solution Approach 2:
The solution moves from a two-dimensional planar arrangement to a three-dimensional structure by inserting a ground electrode between the capacitor plates. This vertical dimension allows the ground electrode to intercept electric field lines that would otherwise couple the capacitors horizontally, reducing parasitic capacitance while maintaining compact packaging.
2Object-affected harmful factors
If the distance between capacitors is increased, then parasitic mutual capacitances are reduced, but device integration density decreases
Solution Approach 1:
The ground electrode serves as a mediating structure that enables high-density integration by allowing capacitors to be placed in close proximity. By providing an electromagnetic shielding mechanism, it permits aggressive spacing that would otherwise result in excessive parasitic coupling, thereby maintaining high integration density while controlling parasitic effects.
Solution Approach 2:
The ground electrode is nested between the capacitor structures, fitting into the vertical space between capacitor plates. This nested arrangement allows the shielding function to be integrated within the existing capacitor structure without adding significant lateral footprint, preserving integration density.
3Object-affected harmful factors
If shielding connections are added between capacitors, then parasitic mutual capacitances are reduced, but device complexity increases
Solution Approach 1:
The ground electrode is merged with the existing capacitor electrode structure, sharing the same fabrication process and material layers. The shielding function is combined with the capacitive structure itself, eliminating the need for separate shielding components and reducing overall device complexity.
Solution Approach 2:
The ground electrode performs multiple functions: it serves as part of the capacitor structure, provides electromagnetic shielding, and connects to ground potential. This multi-functionality reduces the need for additional dedicated shielding elements, simplifying the overall device design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic mutual capacitance by up to 20 dB over a frequency range of 1 GHz to 10 GHz, minimizing package form factor while improving electrical performance.
Implementation Method 1
The first and the fourth electrodes are connected by a connection through the dielectric layer to shield a mutual capacitance between the first and second capacitors
Data Source
AI summary
A method to reduce parasitic mutual capacitances in embedded passives. A first capacitor is formed by first and second electrodes embedding a dielectric layer. A second capacitor is formed by third and fourth electrodes embedding the dielectric layer. The third and first electrodes are etched from a first metal layer. The fourth and second electrodes are etched from a second metal layer. The first and the fourth electrodes are connected by a connection through the dielectric layer to shield a mutual capacitance between the first and second capacitors.